/linux-6.6.21/drivers/net/ethernet/marvell/octeon_ep/ |
D | octep_tx.c | 16 static void octep_iq_reset_indices(struct octep_iq *iq) in octep_iq_reset_indices() argument 18 iq->fill_cnt = 0; in octep_iq_reset_indices() 19 iq->host_write_index = 0; in octep_iq_reset_indices() 20 iq->octep_read_index = 0; in octep_iq_reset_indices() 21 iq->flush_index = 0; in octep_iq_reset_indices() 22 iq->pkts_processed = 0; in octep_iq_reset_indices() 23 iq->pkt_in_done = 0; in octep_iq_reset_indices() 24 atomic_set(&iq->instr_pending, 0); in octep_iq_reset_indices() 33 int octep_iq_process_completions(struct octep_iq *iq, u16 budget) in octep_iq_process_completions() argument 36 struct octep_device *oct = iq->octep_dev; in octep_iq_process_completions() [all …]
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D | octep_main.c | 59 ioq_vector->iq = oct->iq[i]; in octep_alloc_ioq_vectors() 355 static void octep_enable_ioq_irq(struct octep_iq *iq, struct octep_oq *oq) in octep_enable_ioq_irq() argument 359 netdev_dbg(iq->netdev, "enabling intr for Q-%u\n", iq->q_no); in octep_enable_ioq_irq() 360 if (iq->pkts_processed) { in octep_enable_ioq_irq() 361 writel(iq->pkts_processed, iq->inst_cnt_reg); in octep_enable_ioq_irq() 362 iq->pkt_in_done -= iq->pkts_processed; in octep_enable_ioq_irq() 363 iq->pkts_processed = 0; in octep_enable_ioq_irq() 373 writeq(1UL << OCTEP_IQ_INTR_RESEND_BIT, iq->inst_cnt_reg); in octep_enable_ioq_irq() 388 tx_pending = octep_iq_process_completions(ioq_vector->iq, budget); in octep_napi_poll() 398 octep_enable_ioq_irq(ioq_vector->iq, ioq_vector->oq); in octep_napi_poll() [all …]
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D | octep_config.h | 53 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) 54 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs) 55 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) 56 #define CFG_GET_IQ_PKIND(cfg) ((cfg)->iq.pkind) 58 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) 59 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cfg)->iq.intr_threshold) 187 struct octep_iq_config iq; member
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D | octep_cn9k_pf.c | 229 conf->iq.num_descs = OCTEP_IQ_MAX_DESCRIPTORS; in octep_init_config_cn93_pf() 230 conf->iq.instr_type = OCTEP_64BYTE_INSTR; in octep_init_config_cn93_pf() 231 conf->iq.pkind = 0; in octep_init_config_cn93_pf() 232 conf->iq.db_min = OCTEP_DB_MIN; in octep_init_config_cn93_pf() 233 conf->iq.intr_threshold = OCTEP_IQ_INTR_THRESHOLD; in octep_init_config_cn93_pf() 264 struct octep_iq *iq = oct->iq[iq_no]; in octep_setup_iq_regs_cn93_pf() local 285 iq->desc_ring_dma); in octep_setup_iq_regs_cn93_pf() 287 iq->max_count); in octep_setup_iq_regs_cn93_pf() 292 iq->doorbell_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cn93_pf() 294 iq->inst_cnt_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cn93_pf() [all …]
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D | octep_ethtool.c | 161 struct octep_iq *iq = oct->iq[q]; in octep_get_ethtool_stats() local 164 tx_packets += iq->stats.instr_completed; in octep_get_ethtool_stats() 165 tx_bytes += iq->stats.bytes_sent; in octep_get_ethtool_stats() 166 tx_busy_errors += iq->stats.tx_busy; in octep_get_ethtool_stats() 209 struct octep_iq *iq = oct->iq[q]; in octep_get_ethtool_stats() local 211 data[i++] = iq->stats.instr_posted; in octep_get_ethtool_stats() 212 data[i++] = iq->stats.instr_completed; in octep_get_ethtool_stats() 213 data[i++] = iq->stats.bytes_sent; in octep_get_ethtool_stats() 214 data[i++] = iq->stats.tx_busy; in octep_get_ethtool_stats()
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D | octep_main.h | 72 u32 (*update_iq_read_idx)(struct octep_iq *iq); 126 struct octep_iq *iq; member 229 struct octep_iq *iq[OCTEP_MAX_IQ]; member 371 int octep_iq_process_completions(struct octep_iq *iq, u16 budget);
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/linux-6.6.21/drivers/crypto/cavium/zip/ |
D | zip_device.c | 59 return ((zip_dev->iq[queue].sw_head - zip_dev->iq[queue].sw_tail) * in zip_cmd_queue_consumed() 98 spin_lock(&zip_dev->iq[queue].lock); in zip_load_instr() 109 zip_dbg("sw_head : %lx", zip_dev->iq[queue].sw_head); in zip_load_instr() 110 zip_dbg("sw_tail : %lx", zip_dev->iq[queue].sw_tail); in zip_load_instr() 117 memcpy((u8 *)zip_dev->iq[queue].sw_head, (u8 *)instr, in zip_load_instr() 119 zip_dev->iq[queue].sw_head += 16; /* 16 64_bit words = 128B */ in zip_load_instr() 122 ncb_ptr = zip_dev->iq[queue].sw_head; in zip_load_instr() 125 ncb_ptr, zip_dev->iq[queue].sw_head - 16); in zip_load_instr() 128 zip_dev->iq[queue].sw_head = zip_dev->iq[queue].sw_tail; in zip_load_instr() 130 zip_dev->iq[queue].free_flag = 1; in zip_load_instr() [all …]
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D | zip_mem.c | 59 zip->iq[q].sw_head = (u64 *)__get_free_pages((GFP_KERNEL | GFP_DMA), in zip_cmd_qbuf_alloc() 62 if (!zip->iq[q].sw_head) in zip_cmd_qbuf_alloc() 65 memset(zip->iq[q].sw_head, 0, ZIP_CMD_QBUF_SIZE); in zip_cmd_qbuf_alloc() 67 zip_dbg("cmd_qbuf_alloc[%d] Success : %p\n", q, zip->iq[q].sw_head); in zip_cmd_qbuf_alloc() 78 zip_dbg("Freeing cmd_qbuf 0x%lx\n", zip->iq[q].sw_tail); in zip_cmd_qbuf_free() 80 free_pages((u64)zip->iq[q].sw_tail, get_order(ZIP_CMD_QBUF_SIZE)); in zip_cmd_qbuf_free()
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D | zip_main.c | 172 memset(&zip->iq[q], 0x0, sizeof(struct zip_iq)); in zip_init_hw() 174 spin_lock_init(&zip->iq[q].lock); in zip_init_hw() 185 zip->iq[q].sw_tail = zip->iq[q].sw_head; in zip_init_hw() 186 zip->iq[q].hw_tail = zip->iq[q].sw_head; in zip_init_hw() 190 que_sbuf_addr.s.ptr = (__pa(zip->iq[q].sw_head) >> in zip_init_hw() 203 zip->iq[q].sw_head, zip->iq[q].sw_tail, in zip_init_hw() 204 zip->iq[q].hw_tail); in zip_init_hw()
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/linux-6.6.21/drivers/net/ethernet/cavium/liquidio/ |
D | request_manager.c | 51 struct octeon_instr_queue *iq; in octeon_init_instr_queue() local 73 iq = oct->instr_queue[iq_no]; in octeon_init_instr_queue() 75 iq->oct_dev = oct; in octeon_init_instr_queue() 77 iq->base_addr = lio_dma_alloc(oct, q_size, &iq->base_addr_dma); in octeon_init_instr_queue() 78 if (!iq->base_addr) { in octeon_init_instr_queue() 84 iq->max_count = num_descs; in octeon_init_instr_queue() 89 iq->request_list = vzalloc_node(array_size(num_descs, sizeof(*iq->request_list)), in octeon_init_instr_queue() 91 if (!iq->request_list) in octeon_init_instr_queue() 92 iq->request_list = vzalloc(array_size(num_descs, sizeof(*iq->request_list))); in octeon_init_instr_queue() 93 if (!iq->request_list) { in octeon_init_instr_queue() [all …]
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D | cn23xx_vf_regs.h | 70 #define CN23XX_VF_SLI_IQ_PKT_CONTROL64(iq) \ argument 71 (CN23XX_VF_SLI_IQ_PKT_CONTROL_START64 + ((iq) * CN23XX_VF_IQ_OFFSET)) 73 #define CN23XX_VF_SLI_IQ_BASE_ADDR64(iq) \ argument 74 (CN23XX_VF_SLI_IQ_BASE_ADDR_START64 + ((iq) * CN23XX_VF_IQ_OFFSET)) 76 #define CN23XX_VF_SLI_IQ_SIZE(iq) \ argument 77 (CN23XX_VF_SLI_IQ_SIZE_START + ((iq) * CN23XX_VF_IQ_OFFSET)) 79 #define CN23XX_VF_SLI_IQ_DOORBELL(iq) \ argument 80 (CN23XX_VF_SLI_IQ_DOORBELL_START + ((iq) * CN23XX_VF_IQ_OFFSET)) 82 #define CN23XX_VF_SLI_IQ_INSTR_COUNT64(iq) \ argument 83 (CN23XX_VF_SLI_IQ_INSTR_COUNT_START64 + ((iq) * CN23XX_VF_IQ_OFFSET))
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D | cn66xx_regs.h | 143 #define CN6XXX_SLI_IQ_BASE_ADDR64(iq) \ argument 144 (CN6XXX_SLI_IQ_BASE_ADDR_START64 + ((iq) * CN6XXX_IQ_OFFSET)) 146 #define CN6XXX_SLI_IQ_SIZE(iq) \ argument 147 (CN6XXX_SLI_IQ_SIZE_START + ((iq) * CN6XXX_IQ_OFFSET)) 149 #define CN6XXX_SLI_IQ_PKT_INSTR_HDR64(iq) \ argument 150 (CN6XXX_SLI_IQ_PKT_INSTR_HDR_START64 + ((iq) * CN6XXX_IQ_OFFSET)) 152 #define CN6XXX_SLI_IQ_DOORBELL(iq) \ argument 153 (CN6XXX_SLI_IQ_DOORBELL_START + ((iq) * CN6XXX_IQ_OFFSET)) 155 #define CN6XXX_SLI_IQ_INSTR_COUNT(iq) \ argument 156 (CN6XXX_SLI_IQ_INSTR_COUNT_START + ((iq) * CN6XXX_IQ_OFFSET)) [all …]
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D | cn23xx_vf_device.c | 104 struct octeon_instr_queue *iq; in cn23xx_vf_setup_global_input_regs() local 116 iq = oct->instr_queue[q_no]; in cn23xx_vf_setup_global_input_regs() 118 if (iq) in cn23xx_vf_setup_global_input_regs() 119 inst_cnt_reg = iq->inst_cnt_reg; in cn23xx_vf_setup_global_input_regs() 214 struct octeon_instr_queue *iq = oct->instr_queue[iq_no]; in cn23xx_setup_vf_iq_regs() local 219 iq->base_addr_dma); in cn23xx_setup_vf_iq_regs() 220 octeon_write_csr(oct, CN23XX_VF_SLI_IQ_SIZE(iq_no), iq->max_count); in cn23xx_setup_vf_iq_regs() 225 iq->doorbell_reg = in cn23xx_setup_vf_iq_regs() 227 iq->inst_cnt_reg = in cn23xx_setup_vf_iq_regs() 230 iq_no, iq->doorbell_reg, iq->inst_cnt_reg); in cn23xx_setup_vf_iq_regs() [all …]
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D | cn23xx_pf_regs.h | 170 #define CN23XX_SLI_IQ_PKT_CONTROL64(iq) \ argument 171 (CN23XX_SLI_IQ_PKT_CONTROL_START64 + ((iq) * CN23XX_IQ_OFFSET)) 173 #define CN23XX_SLI_IQ_BASE_ADDR64(iq) \ argument 174 (CN23XX_SLI_IQ_BASE_ADDR_START64 + ((iq) * CN23XX_IQ_OFFSET)) 176 #define CN23XX_SLI_IQ_SIZE(iq) \ argument 177 (CN23XX_SLI_IQ_SIZE_START + ((iq) * CN23XX_IQ_OFFSET)) 179 #define CN23XX_SLI_IQ_DOORBELL(iq) \ argument 180 (CN23XX_SLI_IQ_DOORBELL_START + ((iq) * CN23XX_IQ_OFFSET)) 182 #define CN23XX_SLI_IQ_INSTR_COUNT64(iq) \ argument 183 (CN23XX_SLI_IQ_INSTR_COUNT_START64 + ((iq) * CN23XX_IQ_OFFSET))
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D | cn66xx_device.c | 266 struct octeon_instr_queue *iq = oct->instr_queue[iq_no]; in lio_cn6xxx_setup_iq_regs() local 272 iq->base_addr_dma); in lio_cn6xxx_setup_iq_regs() 273 octeon_write_csr(oct, CN6XXX_SLI_IQ_SIZE(iq_no), iq->max_count); in lio_cn6xxx_setup_iq_regs() 278 iq->doorbell_reg = oct->mmio[0].hw_addr + CN6XXX_SLI_IQ_DOORBELL(iq_no); in lio_cn6xxx_setup_iq_regs() 279 iq->inst_cnt_reg = oct->mmio[0].hw_addr in lio_cn6xxx_setup_iq_regs() 282 iq_no, iq->doorbell_reg, iq->inst_cnt_reg); in lio_cn6xxx_setup_iq_regs() 287 iq->reset_instr_cnt = readl(iq->inst_cnt_reg); in lio_cn6xxx_setup_iq_regs() 339 mask |= oct->io_qmask.iq; in lio_cn6xxx_enable_io_queues() 357 mask ^= oct->io_qmask.iq; in lio_cn6xxx_disable_io_queues() 361 mask = (u32)oct->io_qmask.iq; in lio_cn6xxx_disable_io_queues() [all …]
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D | octeon_config.h | 121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) 122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs) 123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size) 124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) 125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) 126 #define CFG_GET_IQ_DB_TIMEOUT(cfg) ((cfg)->iq.db_timeout) 128 #define CFG_GET_IQ_INTR_PKT(cfg) ((cfg)->iq.iq_intr_pkt) 129 #define CFG_SET_IQ_INTR_PKT(cfg, val) (cfg)->iq.iq_intr_pkt = val 410 struct octeon_iq_config iq; member
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D | octeon_device.c | 41 .iq = { 150 .iq = { 316 .iq = { 419 .iq = { 656 if (oct->io_qmask.iq & BIT_ULL(i)) in octeon_free_device_mem() 1285 (oct->io_qmask.iq & BIT_ULL(q_no))) in octeon_get_tx_qsize() 1451 void lio_enable_irq(struct octeon_droq *droq, struct octeon_instr_queue *iq) in lio_enable_irq() argument 1464 if (iq) { in lio_enable_irq() 1465 spin_lock_bh(&iq->lock); in lio_enable_irq() 1466 writel(iq->pkts_processed, iq->inst_cnt_reg); in lio_enable_irq() [all …]
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D | lio_vf_main.c | 121 struct octeon_instr_queue *iq; in pcierror_quiesce_device() local 123 if (!(oct->io_qmask.iq & BIT_ULL(i))) in pcierror_quiesce_device() 125 iq = oct->instr_queue[i]; in pcierror_quiesce_device() 127 if (atomic_read(&iq->instr_pending)) { in pcierror_quiesce_device() 128 spin_lock_bh(&iq->lock); in pcierror_quiesce_device() 129 iq->fill_cnt = 0; in pcierror_quiesce_device() 130 iq->octeon_read_index = iq->host_write_index; in pcierror_quiesce_device() 131 iq->stats.instr_processed += in pcierror_quiesce_device() 132 atomic_read(&iq->instr_pending); in pcierror_quiesce_device() 133 lio_process_iq_request_list(oct, iq, 0); in pcierror_quiesce_device() [all …]
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D | cn68xx_regs.h | 32 #define CN68XX_SLI_IQ_PORT_PKIND(iq) \ argument 33 (CN68XX_SLI_IQ_PORT0_PKIND + ((iq) * CN6XXX_IQ_OFFSET))
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D | cn23xx_pf_device.c | 403 struct octeon_instr_queue *iq; in cn23xx_pf_setup_global_input_regs() local 446 iq = oct->instr_queue[q_no]; in cn23xx_pf_setup_global_input_regs() 447 if (iq) in cn23xx_pf_setup_global_input_regs() 448 inst_cnt_reg = iq->inst_cnt_reg; in cn23xx_pf_setup_global_input_regs() 589 struct octeon_instr_queue *iq = oct->instr_queue[iq_no]; in cn23xx_setup_iq_regs() local 596 iq->base_addr_dma); in cn23xx_setup_iq_regs() 597 octeon_write_csr(oct, CN23XX_SLI_IQ_SIZE(iq_no), iq->max_count); in cn23xx_setup_iq_regs() 602 iq->doorbell_reg = in cn23xx_setup_iq_regs() 604 iq->inst_cnt_reg = in cn23xx_setup_iq_regs() 607 iq_no, iq->doorbell_reg, iq->inst_cnt_reg); in cn23xx_setup_iq_regs() [all …]
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/linux-6.6.21/drivers/crypto/marvell/octeontx2/ |
D | otx2_cptlf.h | 124 struct otx2_cpt_inst_queue *iq; in otx2_cpt_free_instruction_queues() local 128 iq = &lfs->lf[i].iqueue; in otx2_cpt_free_instruction_queues() 129 if (iq->real_vaddr) in otx2_cpt_free_instruction_queues() 131 iq->size, in otx2_cpt_free_instruction_queues() 132 iq->real_vaddr, in otx2_cpt_free_instruction_queues() 133 iq->real_dma_addr); in otx2_cpt_free_instruction_queues() 134 iq->real_vaddr = NULL; in otx2_cpt_free_instruction_queues() 135 iq->vaddr = NULL; in otx2_cpt_free_instruction_queues() 142 struct otx2_cpt_inst_queue *iq; in otx2_cpt_alloc_instruction_queues() local 149 iq = &lfs->lf[i].iqueue; in otx2_cpt_alloc_instruction_queues() [all …]
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/linux-6.6.21/drivers/scsi/csiostor/ |
D | csio_isr.c | 212 csio_scsi_isr_handler(struct csio_q *iq) in csio_scsi_isr_handler() argument 214 struct csio_hw *hw = (struct csio_hw *)iq->owner; in csio_scsi_isr_handler() 223 if (unlikely(csio_wr_process_iq(hw, iq, csio_process_scsi_cmpl, in csio_scsi_isr_handler() 258 struct csio_q *iq = (struct csio_q *) dev_id; in csio_scsi_isr() local 261 if (unlikely(!iq)) in csio_scsi_isr() 264 hw = (struct csio_hw *)iq->owner; in csio_scsi_isr() 271 csio_scsi_isr_handler(iq); in csio_scsi_isr() 288 struct csio_q *iq = priv; in csio_scsi_intx_handler() local 290 csio_scsi_isr_handler(iq); in csio_scsi_intx_handler()
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D | csio_wr.h | 410 struct csio_iq iq; member 463 #define csio_q_iqid(__hw, __idx) ((__hw)->wrm.q_arr[(__idx)]->un.iq.iqid) 465 ((__hw)->wrm.q_arr[(__idx)]->un.iq.physiqid) 467 ((__hw)->wrm.q_arr[(__idx)]->un.iq.flq_idx) 473 #define csio_iq_has_fl(__iq) ((__iq)->un.iq.flq_idx != -1) 476 csio_q_flid((__hw), (__hw)->wrm.q_arr[(__iq_qidx)]->un.iq.flq_idx)
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D | csio_wr.c | 255 q->un.iq.genbit = 1; in csio_wr_alloc_q() 278 q->un.iq.flq_idx = flq_idx; in csio_wr_alloc_q() 280 flq = wrm->q_arr[q->un.iq.flq_idx]; in csio_wr_alloc_q() 306 q->un.iq.flq_idx = -1; in csio_wr_alloc_q() 310 q->un.iq.iq_intx_handler = iq_intx_handler; in csio_wr_alloc_q() 771 q->un.iq.genbit = 1; in csio_wr_cleanup_iq_ftr() 1054 struct csio_q *flq = hw->wrm.q_arr[q->un.iq.flq_idx]; in csio_wr_process_fl() 1113 return (q->un.iq.genbit == (ftr->u.type_gen >> IQWRF_GEN_SHIFT)); in csio_is_new_iqwr() 1140 wrm->q_arr[q->un.iq.flq_idx] : NULL; in csio_wr_process_iq() 1184 q_completed->un.iq.iq_intx_handler); in csio_wr_process_iq() [all …]
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/linux-6.6.21/scripts/ |
D | tags.sh | 261 if $1 --version 2>&1 | grep -iq universal; then 282 if ! $1 --list-languages | grep -iq kconfig; then 300 if $1 --version 2>&1 | grep -iq exuberant; then 302 elif $1 --version 2>&1 | grep -iq emacs; then
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