Searched refs:hw_dsc (Results 1 – 4 of 4) sorted by relevance
| /linux-6.6.21/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_dsc_1_2.c | 59 static int _dsc_calc_output_buf_max_addr(struct dpu_hw_dsc *hw_dsc, int num_softslice) in _dsc_calc_output_buf_max_addr() argument
63 if (hw_dsc->caps->features & BIT(DPU_DSC_NATIVE_42x_EN)) in _dsc_calc_output_buf_max_addr()
69 static void dpu_hw_dsc_disable_1_2(struct dpu_hw_dsc *hw_dsc) in dpu_hw_dsc_disable_1_2() argument
74 if (!hw_dsc) in dpu_hw_dsc_disable_1_2()
77 hw = &hw_dsc->hw; in dpu_hw_dsc_disable_1_2()
78 sblk = hw_dsc->caps->sblk; in dpu_hw_dsc_disable_1_2()
85 static void dpu_hw_dsc_config_1_2(struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_config_1_2() argument
97 if (!hw_dsc || !dsc) in dpu_hw_dsc_config_1_2()
100 hw = &hw_dsc->hw; in dpu_hw_dsc_config_1_2()
102 sblk = hw_dsc->caps->sblk; in dpu_hw_dsc_config_1_2()
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| D | dpu_hw_dsc.c | 43 static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_config() argument
48 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config()
125 static void dpu_hw_dsc_config_thresh(struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_config_thresh() argument
129 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config_thresh()
159 struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_bind_pingpong_blk() argument
162 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_bind_pingpong_blk()
166 dsc_ctl_offset = DSC_CTL(hw_dsc->idx); in dpu_hw_dsc_bind_pingpong_blk()
173 hw_dsc->idx - DSC_0, pp - PINGPONG_0); in dpu_hw_dsc_bind_pingpong_blk()
176 hw_dsc->idx - DSC_0); in dpu_hw_dsc_bind_pingpong_blk()
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| D | dpu_hw_dsc.h | 27 void (*dsc_disable)(struct dpu_hw_dsc *hw_dsc);
36 void (*dsc_config)(struct dpu_hw_dsc *hw_dsc,
46 void (*dsc_config_thresh)(struct dpu_hw_dsc *hw_dsc,
49 void (*dsc_bind_pingpong_blk)(struct dpu_hw_dsc *hw_dsc,
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| D | dpu_encoder.c | 181 struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC]; member
1050 struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set() local
1092 hw_dsc, ARRAY_SIZE(hw_dsc)); in dpu_encoder_virt_atomic_mode_set()
1094 dpu_enc->hw_dsc[i] = to_dpu_hw_dsc(hw_dsc[i]); in dpu_encoder_virt_atomic_mode_set()
1095 dsc_mask |= BIT(dpu_enc->hw_dsc[i]->idx - DSC_0); in dpu_encoder_virt_atomic_mode_set()
1798 struct dpu_hw_dsc *hw_dsc, in dpu_encoder_dsc_pipe_cfg() argument
1804 if (hw_dsc->ops.dsc_config) in dpu_encoder_dsc_pipe_cfg()
1805 hw_dsc->ops.dsc_config(hw_dsc, dsc, common_mode, initial_lines); in dpu_encoder_dsc_pipe_cfg()
1807 if (hw_dsc->ops.dsc_config_thresh) in dpu_encoder_dsc_pipe_cfg()
1808 hw_dsc->ops.dsc_config_thresh(hw_dsc, dsc); in dpu_encoder_dsc_pipe_cfg()
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