| /linux-6.6.21/drivers/phy/microchip/ |
| D | sparx5_serdes.h | 52 int gbase, int ginst, in sdx5_addr() argument
61 gbase + ((ginst) * gwidth) + in sdx5_addr()
66 int gbase, int ginst, in sdx5_inst_baseaddr() argument
74 gbase + ((ginst) * gwidth) + in sdx5_inst_baseaddr()
80 int gbase, int ginst, int gcnt, int gwidth, in sdx5_rmw() argument
86 gbase, ginst, gcnt, gwidth, in sdx5_rmw()
95 int gbase, int ginst, int gcnt, int gwidth, in sdx5_inst_rmw() argument
101 gbase, ginst, gcnt, gwidth, in sdx5_inst_rmw()
125 int gbase, in sdx5_inst_addr() argument
130 return sdx5_inst_baseaddr(iomem, gbase, ginst, gcnt, gwidth, in sdx5_inst_addr()
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| D | lan966x_serdes.c | 21 gbase, ginst, gcnt, gwidth, \ argument
23 (gbase + ((ginst) * gwidth) + raddr + ((rinst) * rwidth))
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| /linux-6.6.21/drivers/clk/berlin/ |
| D | bg2.c | 87 static void __iomem *gbase; variable
510 gbase = of_iomap(parent_np, 0); in berlin2_clock_setup()
512 if (!gbase) in berlin2_clock_setup()
529 ret = berlin2_pll_register(&bg2_pll_map, gbase + REG_SYSPLLCTL0, in berlin2_clock_setup()
534 ret = berlin2_pll_register(&bg2_pll_map, gbase + REG_MEMPLLCTL0, in berlin2_clock_setup()
539 ret = berlin2_pll_register(&bg2_pll_map, gbase + REG_CPUPLLCTL0, in berlin2_clock_setup()
548 ret = berlin2_avpll_vco_register(gbase + REG_AVPLLCTL0, "avpll_vcoA", in berlin2_clock_setup()
554 ret = berlin2_avpll_channel_register(gbase + REG_AVPLLCTL0, in berlin2_clock_setup()
561 ret = berlin2_avpll_vco_register(gbase + REG_AVPLLCTL31, "avpll_vcoB", in berlin2_clock_setup()
568 ret = berlin2_avpll_channel_register(gbase + REG_AVPLLCTL31, in berlin2_clock_setup()
[all …]
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| D | bg2q.c | 41 static void __iomem *gbase; variable
296 gbase = of_iomap(parent_np, 0); in berlin2q_clock_setup()
297 if (!gbase) { in berlin2q_clock_setup()
308 iounmap(gbase); in berlin2q_clock_setup()
320 ret = berlin2_pll_register(&bg2q_pll_map, gbase + REG_SYSPLLCTL0, in berlin2q_clock_setup()
345 hws[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase, in berlin2q_clock_setup()
355 gd->parent_name, gd->flags, gbase + REG_CLKENABLE, in berlin2q_clock_setup()
383 iounmap(gbase); in berlin2q_clock_setup()
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| /linux-6.6.21/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls2088a-rdb.dts | 28 phy-connection-type = "10gbase-r";
33 phy-connection-type = "10gbase-r";
38 phy-connection-type = "10gbase-r";
43 phy-connection-type = "10gbase-r";
48 phy-connection-type = "10gbase-r";
53 phy-connection-type = "10gbase-r";
58 phy-connection-type = "10gbase-r";
63 phy-connection-type = "10gbase-r";
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| D | fsl-ls2080a-rdb.dts | 30 phy-connection-type = "10gbase-r";
35 phy-connection-type = "10gbase-r";
40 phy-connection-type = "10gbase-r";
45 phy-connection-type = "10gbase-r";
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| D | fsl-ls1088a-ten64.dts | 96 phy-connection-type = "10gbase-r";
104 phy-connection-type = "10gbase-r";
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| D | fsl-ls1046a-rdb.dts | 156 phy-connection-type = "10gbase-r";
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| /linux-6.6.21/drivers/net/ethernet/microchip/sparx5/ |
| D | sparx5_main.h | 572 int gbase, int ginst, in spx5_offset() argument
580 return gbase + ((ginst) * gwidth) + in spx5_offset()
589 int gbase, int ginst, in spx5_addr() argument
598 gbase + ((ginst) * gwidth) + in spx5_addr()
603 int gbase, int ginst, in spx5_inst_addr() argument
611 gbase + ((ginst) * gwidth) + in spx5_inst_addr()
616 int gbase, int ginst, int gcnt, int gwidth, in spx5_rd() argument
619 return readl(spx5_addr(sparx5->regs, id, tinst, tcnt, gbase, ginst, in spx5_rd()
624 int gbase, int ginst, int gcnt, int gwidth, in spx5_inst_rd() argument
627 return readl(spx5_inst_addr(iomem, gbase, ginst, in spx5_inst_rd()
[all …]
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| /linux-6.6.21/arch/arm64/boot/dts/microchip/ |
| D | sparx5_pcb134_board.dtsi | 720 phy-mode = "10gbase-r";
730 phy-mode = "10gbase-r";
739 phy-mode = "10gbase-r";
748 phy-mode = "10gbase-r";
757 phy-mode = "10gbase-r";
766 phy-mode = "10gbase-r";
775 phy-mode = "10gbase-r";
784 phy-mode = "10gbase-r";
793 phy-mode = "10gbase-r";
802 phy-mode = "10gbase-r";
[all …]
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| D | sparx5_pcb135_board.dtsi | 715 phy-mode = "10gbase-r";
723 phy-mode = "10gbase-r";
731 phy-mode = "10gbase-r";
739 phy-mode = "10gbase-r";
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| /linux-6.6.21/Documentation/devicetree/bindings/phy/ |
| D | transmit-amplitude.yaml | 44 - 5gbase-r
47 - 10gbase-kr
49 - 10gbase-r
50 - 25gbase-r
|
| /linux-6.6.21/drivers/net/ethernet/microchip/lan966x/ |
| D | lan966x_main.h | 747 int gbase, int ginst, in lan_addr() argument
756 gbase + ((ginst) * gwidth) + in lan_addr()
761 int gbase, int ginst, int gcnt, int gwidth, in lan_rd() argument
764 return readl(lan_addr(lan966x->regs, id, tinst, tcnt, gbase, ginst, in lan_rd()
770 int gbase, int ginst, int gcnt, int gwidth, in lan_wr() argument
774 gbase, ginst, gcnt, gwidth, in lan_wr()
780 int gbase, int ginst, int gcnt, int gwidth, in lan_rmw() argument
785 nval = readl(lan_addr(lan966x->regs, id, tinst, tcnt, gbase, ginst, in lan_rmw()
788 writel(nval, lan_addr(lan966x->regs, id, tinst, tcnt, gbase, ginst, in lan_rmw()
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| /linux-6.6.21/arch/arm64/boot/dts/marvell/ |
| D | armada-8040-mcbin.dts | 37 phy-mode = "10gbase-r";
44 phy-mode = "10gbase-r";
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| D | armada-8040-mcbin-singleshot.dts | 34 phy-mode = "10gbase-r";
41 phy-mode = "10gbase-r";
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| D | cn9130-crb.dtsi | 278 phy-mode = "10gbase-r";
286 phy-mode = "10gbase-r";
346 phy-mode = "10gbase-r";
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| D | armada-8040-db.dts | 198 phy-mode = "10gbase-r";
351 phy-mode = "10gbase-r";
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| D | armada-8040-puzzle-m801.dts | 383 phy-mode = "10gbase-r";
457 phy-mode = "10gbase-r";
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| D | cn9131-db.dtsi | 88 phy-mode = "10gbase-r";
|
| /linux-6.6.21/Documentation/devicetree/bindings/net/ |
| D | microchip,sparx5-switch.yaml | 167 phy-mode = "10gbase-r";
176 phy-mode = "10gbase-r";
185 phy-mode = "10gbase-r";
194 phy-mode = "10gbase-r";
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| D | ethernet-controller.yaml | 98 - 5gbase-r
103 - 10gbase-kr
105 - 10gbase-r
106 - 25gbase-r
|
| D | marvell,pp2.yaml | 111 - 5gbase-r
113 - 10gbase-r
258 phy-mode = "10gbase-r";
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| D | nvidia,tegra234-mgbe.yaml | 85 - 10gbase-kr
|
| /linux-6.6.21/Documentation/ABI/testing/ |
| D | sysfs-class-net-phydev | 44 xaui, 10gbase-kr, unknown
|
| /linux-6.6.21/drivers/mfd/ |
| D | lpc_ich.c | 93 int gbase; /* GPIO base */ member
1038 pci_read_config_dword(dev, priv->gbase, &base_addr_cfg); in lpc_ich_init_gpio()
1314 priv->gbase = GPIOBASE_ICH0; in lpc_ich_probe()
1317 priv->gbase = GPIOBASE_ICH6; in lpc_ich_probe()
|