Searched refs:first_vlan_qualifier (Results 1 – 4 of 4) sorted by relevance
/linux-6.6.21/drivers/net/ethernet/mellanox/mlx5/core/steering/ |
D | mlx5_ifc_dr_ste_v1.h | 213 u8 first_vlan_qualifier[0x2]; member 247 u8 first_vlan_qualifier[0x2]; member 282 u8 first_vlan_qualifier[0x2]; member 331 u8 first_vlan_qualifier[0x2]; member
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D | mlx5_ifc_dr.h | 167 u8 first_vlan_qualifier[0x2]; member 200 u8 first_vlan_qualifier[0x2]; member 233 u8 first_vlan_qualifier[0x2]; member 292 u8 first_vlan_qualifier[0x2]; member
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D | dr_ste_v0.c | 727 MLX5_SET(ste_eth_l2_src_dst, bit_mask, first_vlan_qualifier, -1); in dr_ste_v0_build_eth_l2_src_dst_bit_mask() 730 MLX5_SET(ste_eth_l2_src_dst, bit_mask, first_vlan_qualifier, -1); in dr_ste_v0_build_eth_l2_src_dst_bit_mask() 771 MLX5_SET(ste_eth_l2_src_dst, tag, first_vlan_qualifier, DR_STE_CVLAN); in dr_ste_v0_build_eth_l2_src_dst_tag() 774 MLX5_SET(ste_eth_l2_src_dst, tag, first_vlan_qualifier, DR_STE_SVLAN); in dr_ste_v0_build_eth_l2_src_dst_tag() 895 MLX5_SET(ste_eth_l2_src, bit_mask, first_vlan_qualifier, -1); in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask() 957 MLX5_SET(ste_eth_l2_src, tag, first_vlan_qualifier, DR_STE_CVLAN); in dr_ste_v0_build_eth_l2_src_or_dst_tag() 960 MLX5_SET(ste_eth_l2_src, tag, first_vlan_qualifier, DR_STE_SVLAN); in dr_ste_v0_build_eth_l2_src_or_dst_tag() 1087 MLX5_SET(ste_eth_l2_tnl, bit_mask, first_vlan_qualifier, -1); in dr_ste_v0_build_eth_l2_tnl_bit_mask() 1116 MLX5_SET(ste_eth_l2_tnl, tag, first_vlan_qualifier, DR_STE_CVLAN); in dr_ste_v0_build_eth_l2_tnl_tag() 1119 MLX5_SET(ste_eth_l2_tnl, tag, first_vlan_qualifier, DR_STE_SVLAN); in dr_ste_v0_build_eth_l2_tnl_tag()
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D | dr_ste_v1.c | 1118 MLX5_SET(ste_eth_l2_src_dst_v1, bit_mask, first_vlan_qualifier, -1); in dr_ste_v1_build_eth_l2_src_dst_bit_mask() 1121 MLX5_SET(ste_eth_l2_src_dst_v1, bit_mask, first_vlan_qualifier, -1); in dr_ste_v1_build_eth_l2_src_dst_bit_mask() 1153 MLX5_SET(ste_eth_l2_src_dst_v1, tag, first_vlan_qualifier, DR_STE_CVLAN); in dr_ste_v1_build_eth_l2_src_dst_tag() 1156 MLX5_SET(ste_eth_l2_src_dst_v1, tag, first_vlan_qualifier, DR_STE_SVLAN); in dr_ste_v1_build_eth_l2_src_dst_tag() 1269 MLX5_SET(ste_eth_l2_src_v1, bit_mask, first_vlan_qualifier, -1); in dr_ste_v1_build_eth_l2_src_or_dst_bit_mask() 1328 MLX5_SET(ste_eth_l2_src_v1, tag, first_vlan_qualifier, DR_STE_CVLAN); in dr_ste_v1_build_eth_l2_src_or_dst_tag() 1331 MLX5_SET(ste_eth_l2_src_v1, tag, first_vlan_qualifier, DR_STE_SVLAN); in dr_ste_v1_build_eth_l2_src_or_dst_tag() 1451 MLX5_SET(ste_eth_l2_tnl_v1, bit_mask, first_vlan_qualifier, -1); in dr_ste_v1_build_eth_l2_tnl_bit_mask() 1479 MLX5_SET(ste_eth_l2_tnl_v1, tag, first_vlan_qualifier, DR_STE_CVLAN); in dr_ste_v1_build_eth_l2_tnl_tag() 1482 MLX5_SET(ste_eth_l2_tnl_v1, tag, first_vlan_qualifier, DR_STE_SVLAN); in dr_ste_v1_build_eth_l2_tnl_tag()
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