| /linux-6.6.21/drivers/gpu/drm/i915/gt/ |
| D | intel_ring_submission.c | 35 static void set_hwstam(struct intel_engine_cs *engine, u32 mask) in set_hwstam() argument
41 if (engine->class == RENDER_CLASS) { in set_hwstam()
42 if (GRAPHICS_VER(engine->i915) >= 6) in set_hwstam()
48 intel_engine_set_hwsp_writemask(engine, mask); in set_hwstam()
51 static void set_hws_pga(struct intel_engine_cs *engine, phys_addr_t phys) in set_hws_pga() argument
56 if (GRAPHICS_VER(engine->i915) >= 4) in set_hws_pga()
59 intel_uncore_write(engine->uncore, HWS_PGA, addr); in set_hws_pga()
62 static struct page *status_page(struct intel_engine_cs *engine) in status_page() argument
64 struct drm_i915_gem_object *obj = engine->status_page.vma->obj; in status_page()
70 static void ring_setup_phys_status_page(struct intel_engine_cs *engine) in ring_setup_phys_status_page() argument
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| D | intel_engine_heartbeat.c | 23 static bool next_heartbeat(struct intel_engine_cs *engine) in next_heartbeat() argument
28 delay = READ_ONCE(engine->props.heartbeat_interval_ms); in next_heartbeat()
30 rq = engine->heartbeat.systole; in next_heartbeat()
42 delay == engine->defaults.heartbeat_interval_ms) { in next_heartbeat()
50 longer = READ_ONCE(engine->props.preempt_timeout_ms) * 2; in next_heartbeat()
51 longer = intel_clamp_heartbeat_interval_ms(engine, longer); in next_heartbeat()
62 mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay + 1); in next_heartbeat()
79 static void idle_pulse(struct intel_engine_cs *engine, struct i915_request *rq) in idle_pulse() argument
81 engine->wakeref_serial = READ_ONCE(engine->serial) + 1; in idle_pulse()
83 if (!engine->heartbeat.systole && intel_engine_has_heartbeat(engine)) in idle_pulse()
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| D | selftest_engine_heartbeat.c | 14 static void reset_heartbeat(struct intel_engine_cs *engine) in reset_heartbeat() argument
16 intel_engine_set_heartbeat(engine, in reset_heartbeat()
17 engine->defaults.heartbeat_interval_ms); in reset_heartbeat()
37 static int engine_sync_barrier(struct intel_engine_cs *engine) in engine_sync_barrier() argument
39 return timeline_sync(engine->kernel_context->timeline); in engine_sync_barrier()
90 static int __live_idle_pulse(struct intel_engine_cs *engine, in __live_idle_pulse() argument
96 GEM_BUG_ON(!intel_engine_pm_is_awake(engine)); in __live_idle_pulse()
106 err = i915_active_acquire_preallocate_barrier(&p->active, engine); in __live_idle_pulse()
116 GEM_BUG_ON(llist_empty(&engine->barrier_tasks)); in __live_idle_pulse()
118 err = fn(engine); in __live_idle_pulse()
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| D | intel_engine_cs.c | 359 static void __sprint_engine_name(struct intel_engine_cs *engine) in __sprint_engine_name() argument
366 GEM_WARN_ON(snprintf(engine->name, sizeof(engine->name), "%s'%u", in __sprint_engine_name()
367 intel_engine_class_repr(engine->class), in __sprint_engine_name()
368 engine->instance) >= sizeof(engine->name)); in __sprint_engine_name()
371 void intel_engine_set_hwsp_writemask(struct intel_engine_cs *engine, u32 mask) in intel_engine_set_hwsp_writemask() argument
377 if (GRAPHICS_VER(engine->i915) < 6 && engine->class != RENDER_CLASS) in intel_engine_set_hwsp_writemask()
380 if (GRAPHICS_VER(engine->i915) >= 3) in intel_engine_set_hwsp_writemask()
381 ENGINE_WRITE(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()
383 ENGINE_WRITE16(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()
386 static void intel_engine_sanitize_mmio(struct intel_engine_cs *engine) in intel_engine_sanitize_mmio() argument
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| D | mock_engine.c | 60 static struct intel_ring *mock_ring(struct intel_engine_cs *engine) in mock_ring() argument
75 ring->vma = create_ring_vma(engine->gt->ggtt, PAGE_SIZE); in mock_ring()
93 static struct i915_request *first_request(struct mock_engine *engine) in first_request() argument
95 return list_first_entry_or_null(&engine->hw_queue, in first_request()
106 intel_engine_signal_breadcrumbs(request->engine); in advance()
111 struct mock_engine *engine = from_timer(engine, t, hw_delay); in hw_delay_complete() local
115 spin_lock_irqsave(&engine->hw_lock, flags); in hw_delay_complete()
118 request = first_request(engine); in hw_delay_complete()
126 while ((request = first_request(engine))) { in hw_delay_complete()
128 mod_timer(&engine->hw_delay, in hw_delay_complete()
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| D | intel_engine_pm.h | 16 intel_engine_pm_is_awake(const struct intel_engine_cs *engine) in intel_engine_pm_is_awake() argument
18 return intel_wakeref_is_active(&engine->wakeref); in intel_engine_pm_is_awake()
21 static inline void __intel_engine_pm_get(struct intel_engine_cs *engine) in __intel_engine_pm_get() argument
23 __intel_wakeref_get(&engine->wakeref); in __intel_engine_pm_get()
26 static inline void intel_engine_pm_get(struct intel_engine_cs *engine) in intel_engine_pm_get() argument
28 intel_wakeref_get(&engine->wakeref); in intel_engine_pm_get()
31 static inline bool intel_engine_pm_get_if_awake(struct intel_engine_cs *engine) in intel_engine_pm_get_if_awake() argument
33 return intel_wakeref_get_if_active(&engine->wakeref); in intel_engine_pm_get_if_awake()
36 static inline void intel_engine_pm_might_get(struct intel_engine_cs *engine) in intel_engine_pm_might_get() argument
38 if (!intel_engine_is_virtual(engine)) { in intel_engine_pm_might_get()
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| D | intel_execlists_submission.c | 201 static struct virtual_engine *to_virtual_engine(struct intel_engine_cs *engine) in to_virtual_engine() argument
203 GEM_BUG_ON(!intel_engine_is_virtual(engine)); in to_virtual_engine()
204 return container_of(engine, struct virtual_engine, base); in to_virtual_engine()
238 static void ring_set_paused(const struct intel_engine_cs *engine, int state) in ring_set_paused() argument
246 engine->status_page.addr[I915_GEM_HWS_PREEMPT] = state; in ring_set_paused()
297 static bool need_preempt(const struct intel_engine_cs *engine, in need_preempt() argument
302 if (!intel_engine_has_semaphores(engine)) in need_preempt()
324 if (engine->sched_engine->queue_priority_hint <= last_prio) in need_preempt()
331 if (!list_is_last(&rq->sched.link, &engine->sched_engine->requests) && in need_preempt()
345 return max(virtual_prio(&engine->execlists), in need_preempt()
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| D | intel_engine_pm.c | 20 static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) in intel_gsc_idle_msg_enable() argument
22 struct drm_i915_private *i915 = engine->i915; in intel_gsc_idle_msg_enable()
24 if (IS_METEORLAKE(i915) && engine->id == GSC0) { in intel_gsc_idle_msg_enable()
25 intel_uncore_write(engine->gt->uncore, in intel_gsc_idle_msg_enable()
29 intel_uncore_write(engine->gt->uncore, in intel_gsc_idle_msg_enable()
42 int type = intel_gt_coherent_map_type(ce->engine->gt, obj, true); in dbg_poison_ce()
60 struct intel_engine_cs *engine = in __engine_unpark() local
61 container_of(wf, typeof(*engine), wakeref); in __engine_unpark()
64 ENGINE_TRACE(engine, "\n"); in __engine_unpark()
66 intel_gt_pm_get(engine->gt); in __engine_unpark()
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| D | intel_engine.h | 133 intel_read_status_page(const struct intel_engine_cs *engine, int reg) in intel_read_status_page() argument
136 return READ_ONCE(engine->status_page.addr[reg]); in intel_read_status_page()
140 intel_write_status_page(struct intel_engine_cs *engine, int reg, u32 value) in intel_write_status_page() argument
147 drm_clflush_virt_range(&engine->status_page.addr[reg], sizeof(value)); in intel_write_status_page()
148 WRITE_ONCE(engine->status_page.addr[reg], value); in intel_write_status_page()
149 drm_clflush_virt_range(&engine->status_page.addr[reg], sizeof(value)); in intel_write_status_page()
185 void intel_engine_stop(struct intel_engine_cs *engine);
186 void intel_engine_cleanup(struct intel_engine_cs *engine);
191 void intel_engine_free_request_pool(struct intel_engine_cs *engine);
196 int intel_engine_init_common(struct intel_engine_cs *engine);
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| D | intel_engine_user.c | 39 void intel_engine_add_user(struct intel_engine_cs *engine) in intel_engine_add_user() argument
41 llist_add((struct llist_node *)&engine->uabi_node, in intel_engine_add_user()
42 (struct llist_head *)&engine->i915->uabi_engines); in intel_engine_add_user()
88 struct intel_engine_cs *engine = in sort_engines() local
89 container_of((struct rb_node *)pos, typeof(*engine), in sort_engines()
91 list_add((struct list_head *)&engine->uabi_node, engines); in sort_engines()
99 u8 engine; in set_scheduler_caps() member
108 struct intel_engine_cs *engine; in set_scheduler_caps() local
113 for_each_uabi_engine(engine, i915) { /* all engines must agree! */ in set_scheduler_caps()
116 if (engine->sched_engine->schedule) in set_scheduler_caps()
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| D | selftest_context.c | 75 static int __live_context_size(struct intel_engine_cs *engine) in __live_context_size() argument
82 ce = intel_context_create(engine); in __live_context_size()
91 intel_gt_coherent_map_type(engine->gt, in __live_context_size()
112 vaddr += engine->context_size - I915_GTT_PAGE_SIZE; in __live_context_size()
127 rq = intel_engine_create_kernel_request(engine); in __live_context_size()
137 pr_err("%s context overwrote trailing red-zone!", engine->name); in __live_context_size()
151 struct intel_engine_cs *engine; in live_context_size() local
160 for_each_engine(engine, gt, id) { in live_context_size()
163 if (!engine->context_size) in live_context_size()
166 intel_engine_pm_get(engine); in live_context_size()
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| D | selftest_engine_pm.c | 76 struct intel_engine_cs *engine = ce->engine; in __measure_timestamps() local
77 u32 *sema = memset32(engine->status_page.addr + 1000, 0, 5); in __measure_timestamps()
78 u32 offset = i915_ggtt_offset(engine->status_page.vma); in __measure_timestamps()
96 cs = emit_srm(cs, RING_TIMESTAMP(engine->mmio_base), offset + 4000); in __measure_timestamps()
97 cs = emit_srm(cs, RING_CTX_TIMESTAMP(engine->mmio_base), offset + 4004); in __measure_timestamps()
102 cs = emit_srm(cs, RING_TIMESTAMP(engine->mmio_base), offset + 4016); in __measure_timestamps()
103 cs = emit_srm(cs, RING_CTX_TIMESTAMP(engine->mmio_base), offset + 4012); in __measure_timestamps()
108 intel_engine_flush_submission(engine); in __measure_timestamps()
132 engine->name, sema[1], sema[3], sema[0], sema[4]); in __measure_timestamps()
139 static int __live_engine_timestamps(struct intel_engine_cs *engine) in __live_engine_timestamps() argument
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| D | intel_lrc.c | 49 const struct intel_engine_cs *engine, in set_offsets() argument
60 const u32 base = engine->mmio_base; in set_offsets()
78 if (GRAPHICS_VER(engine->i915) >= 11) in set_offsets()
101 if (GRAPHICS_VER(engine->i915) >= 11) in set_offsets()
682 static const u8 *reg_offsets(const struct intel_engine_cs *engine) in reg_offsets() argument
690 GEM_BUG_ON(GRAPHICS_VER(engine->i915) >= 12 && in reg_offsets()
691 !intel_engine_has_relative_mmio(engine)); in reg_offsets()
693 if (engine->flags & I915_ENGINE_HAS_RCS_REG_STATE) { in reg_offsets()
694 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 70)) in reg_offsets()
696 else if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 55)) in reg_offsets()
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| D | selftest_hangcheck.c | 104 hang_create_request(struct hang *h, struct intel_engine_cs *engine) in hang_create_request() argument
157 rq = igt_request_alloc(h->ctx, engine); in hang_create_request()
226 intel_gt_chipset_flush(engine->gt); in hang_create_request()
228 if (rq->engine->emit_init_breadcrumb) { in hang_create_request()
229 err = rq->engine->emit_init_breadcrumb(rq); in hang_create_request()
238 err = rq->engine->emit_bb_start(rq, i915_vma_offset(vma), PAGE_SIZE, flags); in hang_create_request()
288 struct intel_engine_cs *engine; in igt_hang_sanitycheck() local
299 for_each_engine(engine, gt, id) { in igt_hang_sanitycheck()
303 if (!intel_engine_can_store_dword(engine)) in igt_hang_sanitycheck()
306 rq = hang_create_request(&h, engine); in igt_hang_sanitycheck()
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| D | selftest_workarounds.c | 34 } engine[I915_NUM_ENGINES]; member
64 struct intel_engine_cs *engine; in reference_lists_init() local
73 for_each_engine(engine, gt, id) { in reference_lists_init()
74 struct i915_wa_list *wal = &lists->engine[id].wa_list; in reference_lists_init()
76 wa_init_start(wal, gt, "REF", engine->name); in reference_lists_init()
77 engine_init_workarounds(engine, wal); in reference_lists_init()
80 __intel_engine_init_ctx_wa(engine, in reference_lists_init()
81 &lists->engine[id].ctx_wa_list, in reference_lists_init()
89 struct intel_engine_cs *engine; in reference_lists_fini() local
92 for_each_engine(engine, gt, id) in reference_lists_fini()
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| /linux-6.6.21/crypto/ |
| D | crypto_engine.c | 40 static void crypto_finalize_request(struct crypto_engine *engine, in crypto_finalize_request() argument
50 if (!engine->retry_support) { in crypto_finalize_request()
51 spin_lock_irqsave(&engine->queue_lock, flags); in crypto_finalize_request()
52 if (engine->cur_req == req) { in crypto_finalize_request()
53 engine->cur_req = NULL; in crypto_finalize_request()
55 spin_unlock_irqrestore(&engine->queue_lock, flags); in crypto_finalize_request()
61 kthread_queue_work(engine->kworker, &engine->pump_requests); in crypto_finalize_request()
73 static void crypto_pump_requests(struct crypto_engine *engine, in crypto_pump_requests() argument
83 spin_lock_irqsave(&engine->queue_lock, flags); in crypto_pump_requests()
86 if (!engine->retry_support && engine->cur_req) in crypto_pump_requests()
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| /linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/core/ |
| D | engine.c | 31 nvkm_engine_chsw_load(struct nvkm_engine *engine) in nvkm_engine_chsw_load() argument
33 if (engine->func->chsw_load) in nvkm_engine_chsw_load()
34 return engine->func->chsw_load(engine); in nvkm_engine_chsw_load()
39 nvkm_engine_reset(struct nvkm_engine *engine) in nvkm_engine_reset() argument
41 if (engine->func->reset) in nvkm_engine_reset()
42 return engine->func->reset(engine); in nvkm_engine_reset()
44 nvkm_subdev_fini(&engine->subdev, false); in nvkm_engine_reset()
45 return nvkm_subdev_init(&engine->subdev); in nvkm_engine_reset()
51 struct nvkm_engine *engine = *pengine; in nvkm_engine_unref() local
53 if (engine) { in nvkm_engine_unref()
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| /linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | Kbuild | 2 nvkm-y += nvkm/engine/gr/base.o
3 nvkm-y += nvkm/engine/gr/nv04.o
4 nvkm-y += nvkm/engine/gr/nv10.o
5 nvkm-y += nvkm/engine/gr/nv15.o
6 nvkm-y += nvkm/engine/gr/nv17.o
7 nvkm-y += nvkm/engine/gr/nv20.o
8 nvkm-y += nvkm/engine/gr/nv25.o
9 nvkm-y += nvkm/engine/gr/nv2a.o
10 nvkm-y += nvkm/engine/gr/nv30.o
11 nvkm-y += nvkm/engine/gr/nv34.o
[all …]
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| /linux-6.6.21/drivers/gpu/drm/sun4i/ |
| D | sunxi_engine.h | 33 void (*atomic_begin)(struct sunxi_engine *engine,
50 int (*atomic_check)(struct sunxi_engine *engine,
62 void (*commit)(struct sunxi_engine *engine);
78 struct sunxi_engine *engine);
88 void (*apply_color_correction)(struct sunxi_engine *engine);
98 void (*disable_color_correction)(struct sunxi_engine *engine);
111 void (*vblank_quirk)(struct sunxi_engine *engine);
121 void (*mode_set)(struct sunxi_engine *engine,
149 sunxi_engine_commit(struct sunxi_engine *engine) in sunxi_engine_commit() argument
151 if (engine->ops && engine->ops->commit) in sunxi_engine_commit()
[all …]
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| /linux-6.6.21/drivers/video/fbdev/via/ |
| D | accel.c | 13 static int viafb_set_bpp(void __iomem *engine, u8 bpp) in viafb_set_bpp() argument
19 gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc; in viafb_set_bpp()
34 writel(gemode, engine + VIA_REG_GEMODE); in viafb_set_bpp()
39 static int hw_bitblt_1(void __iomem *engine, u8 op, u32 width, u32 height, in hw_bitblt_1() argument
79 ret = viafb_set_bpp(engine, dst_bpp); in hw_bitblt_1()
91 writel(tmp, engine + 0x08); in hw_bitblt_1()
100 writel(tmp, engine + 0x0C); in hw_bitblt_1()
108 writel(tmp, engine + 0x10); in hw_bitblt_1()
111 writel(fg_color, engine + 0x18); in hw_bitblt_1()
114 writel(bg_color, engine + 0x1C); in hw_bitblt_1()
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| /linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| D | Kbuild | 2 nvkm-y += nvkm/engine/disp/base.o
3 nvkm-y += nvkm/engine/disp/chan.o
4 nvkm-y += nvkm/engine/disp/conn.o
5 nvkm-y += nvkm/engine/disp/dp.o
6 nvkm-y += nvkm/engine/disp/hdmi.o
7 nvkm-y += nvkm/engine/disp/head.o
8 nvkm-y += nvkm/engine/disp/ior.o
9 nvkm-y += nvkm/engine/disp/outp.o
10 nvkm-y += nvkm/engine/disp/vga.o
12 nvkm-y += nvkm/engine/disp/nv04.o
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| /linux-6.6.21/drivers/crypto/marvell/cesa/ |
| D | cesa.c | 38 mv_cesa_dequeue_req_locked(struct mv_cesa_engine *engine, in mv_cesa_dequeue_req_locked() argument
43 *backlog = crypto_get_backlog(&engine->queue); in mv_cesa_dequeue_req_locked()
44 req = crypto_dequeue_request(&engine->queue); in mv_cesa_dequeue_req_locked()
52 static void mv_cesa_rearm_engine(struct mv_cesa_engine *engine) in mv_cesa_rearm_engine() argument
58 spin_lock_bh(&engine->lock); in mv_cesa_rearm_engine()
59 if (!engine->req) { in mv_cesa_rearm_engine()
60 req = mv_cesa_dequeue_req_locked(engine, &backlog); in mv_cesa_rearm_engine()
61 engine->req = req; in mv_cesa_rearm_engine()
63 spin_unlock_bh(&engine->lock); in mv_cesa_rearm_engine()
75 static int mv_cesa_std_process(struct mv_cesa_engine *engine, u32 status) in mv_cesa_std_process() argument
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| /linux-6.6.21/drivers/gpu/drm/i915/selftests/ |
| D | intel_scheduler_helpers.c | 19 struct intel_engine_cs *engine; in intel_selftest_find_any_engine() local
22 for_each_engine(engine, gt, id) in intel_selftest_find_any_engine()
23 return engine; in intel_selftest_find_any_engine()
29 int intel_selftest_modify_policy(struct intel_engine_cs *engine, in intel_selftest_modify_policy() argument
35 saved->reset = engine->i915->params.reset; in intel_selftest_modify_policy()
36 saved->flags = engine->flags; in intel_selftest_modify_policy()
37 saved->timeslice = engine->props.timeslice_duration_ms; in intel_selftest_modify_policy()
38 saved->preempt_timeout = engine->props.preempt_timeout_ms; in intel_selftest_modify_policy()
50 engine->i915->params.reset = 2; in intel_selftest_modify_policy()
51 engine->flags |= I915_ENGINE_WANT_FORCED_PREEMPTION; in intel_selftest_modify_policy()
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| /linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| D | Kbuild | 2 nvkm-y += nvkm/engine/fifo/base.o
3 nvkm-y += nvkm/engine/fifo/cgrp.o
4 nvkm-y += nvkm/engine/fifo/chan.o
5 nvkm-y += nvkm/engine/fifo/chid.o
6 nvkm-y += nvkm/engine/fifo/runl.o
7 nvkm-y += nvkm/engine/fifo/runq.o
9 nvkm-y += nvkm/engine/fifo/nv04.o
10 nvkm-y += nvkm/engine/fifo/nv10.o
11 nvkm-y += nvkm/engine/fifo/nv17.o
12 nvkm-y += nvkm/engine/fifo/nv40.o
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| /linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/engine/ |
| D | Kbuild | 2 nvkm-y += nvkm/engine/falcon.o
3 nvkm-y += nvkm/engine/xtensa.o
5 include $(src)/nvkm/engine/bsp/Kbuild
6 include $(src)/nvkm/engine/ce/Kbuild
7 include $(src)/nvkm/engine/cipher/Kbuild
8 include $(src)/nvkm/engine/device/Kbuild
9 include $(src)/nvkm/engine/disp/Kbuild
10 include $(src)/nvkm/engine/dma/Kbuild
11 include $(src)/nvkm/engine/fifo/Kbuild
12 include $(src)/nvkm/engine/gr/Kbuild
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