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Searched refs:eng_sel (Results 1 – 5 of 5) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_4_3.c84 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_4_3_kiq_map_queues() local
98 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v9_4_3_kiq_map_queues()
114 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_4_3_kiq_unmap_queues() local
120 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v9_4_3_kiq_unmap_queues()
141 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_4_3_kiq_query_status() local
151 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx_v9_4_3_kiq_query_status()
213 static void gfx_v9_4_3_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, in gfx_v9_4_3_write_data_to_reg() argument
217 amdgpu_ring_write(ring, WRITE_DATA_ENGINE_SEL(eng_sel) | in gfx_v9_4_3_write_data_to_reg()
225 static void gfx_v9_4_3_wait_reg_mem(struct amdgpu_ring *ring, int eng_sel, in gfx_v9_4_3_wait_reg_mem() argument
236 WAIT_REG_MEM_ENGINE(eng_sel))); in gfx_v9_4_3_wait_reg_mem()
Dgfx_v11_0.c153 uint32_t me = 0, eng_sel = 0; in gfx11_kiq_map_queues() local
158 eng_sel = 0; in gfx11_kiq_map_queues()
162 eng_sel = 4; in gfx11_kiq_map_queues()
166 eng_sel = 5; in gfx11_kiq_map_queues()
182 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx11_kiq_map_queues()
197 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx11_kiq_unmap_queues() local
208 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx11_kiq_unmap_queues()
229 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx11_kiq_query_status() local
238 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx11_kiq_query_status()
288 static void gfx_v11_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, in gfx_v11_0_write_data_to_reg() argument
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Dgfx_v9_0.c791 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_0_kiq_map_queues() local
805 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v9_0_kiq_map_queues()
821 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_0_kiq_unmap_queues() local
827 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx_v9_0_kiq_unmap_queues()
849 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_0_kiq_query_status() local
859 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx_v9_0_kiq_query_status()
960 static void gfx_v9_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, in gfx_v9_0_write_data_to_reg() argument
964 amdgpu_ring_write(ring, WRITE_DATA_ENGINE_SEL(eng_sel) | in gfx_v9_0_write_data_to_reg()
972 static void gfx_v9_0_wait_reg_mem(struct amdgpu_ring *ring, int eng_sel, in gfx_v9_0_wait_reg_mem() argument
983 WAIT_REG_MEM_ENGINE(eng_sel))); in gfx_v9_0_wait_reg_mem()
Dgfx_v10_0.c3514 uint32_t eng_sel = 0; in gfx10_kiq_map_queues() local
3518 eng_sel = 0; in gfx10_kiq_map_queues()
3521 eng_sel = 4; in gfx10_kiq_map_queues()
3524 eng_sel = 5; in gfx10_kiq_map_queues()
3540 PACKET3_MAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx10_kiq_map_queues()
3555 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx10_kiq_unmap_queues() local
3566 PACKET3_UNMAP_QUEUES_ENGINE_SEL(eng_sel) | in gfx10_kiq_unmap_queues()
3587 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx10_kiq_query_status() local
3596 PACKET3_QUERY_STATUS_ENG_SEL(eng_sel)); in gfx10_kiq_query_status()
3733 static void gfx_v10_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, in gfx_v10_0_write_data_to_reg() argument
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/linux-6.6.21/drivers/net/ethernet/qlogic/qed/
Dqed_dev.c745 u32 addr, val, eng_sel; in qed_llh_set_ppfid_affinity() local
761 eng_sel = 0; in qed_llh_set_ppfid_affinity()
764 eng_sel = 1; in qed_llh_set_ppfid_affinity()
767 eng_sel = 2; in qed_llh_set_ppfid_affinity()
777 SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_NON_ROCE, eng_sel); in qed_llh_set_ppfid_affinity()
793 u32 addr, val, eng_sel; in qed_llh_set_roce_affinity() local
805 eng_sel = 0; in qed_llh_set_roce_affinity()
808 eng_sel = 1; in qed_llh_set_roce_affinity()
811 eng_sel = 2; in qed_llh_set_roce_affinity()
828 SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_ROCE, eng_sel); in qed_llh_set_roce_affinity()