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Searched refs:enablement (Results 1 – 25 of 40) sorted by relevance

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/linux-6.6.21/Documentation/riscv/
Dvector.rst13 Two new prctl() calls are added to allow programs to manage the enablement
26 Sets the Vector enablement status of the calling thread, where the control
27 argument consists of two 2-bit enablement statuses and a bit for inheritance
34 enablement status on execve(). The system-wide default setting can be
49 enablement status of current thread, and the setting at bit[3:2] takes place
54 Vector enablement status for the calling thread. The calling thread is
57 but the current enablement status is not off. Setting
59 the original enablement status.
62 Vector enablement setting for the calling thread at the next execve()
64 then the enablement status will be decided by the system-wide
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/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/
Dsmu_internal.h91 #define smu_gfx_ulv_control(smu, enablement) smu_ppt_funcs(gfx_ulv_control, 0, smu, enablement) argument
92 #define smu_deep_sleep_control(smu, enablement) smu_ppt_funcs(deep_sleep_control, 0, smu, enable… argument
95 #define smu_gpo_control(smu, enablement) smu_ppt_funcs(gpo_control, 0, smu, enablement) argument
/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0.c2104 bool enablement) in smu_v13_0_gpo_control() argument
2110 enablement ? 1 : 0, in smu_v13_0_gpo_control()
2113 dev_err(smu->adev->dev, "SetGpoAllow %d failed!\n", enablement); in smu_v13_0_gpo_control()
2119 bool enablement) in smu_v13_0_deep_sleep_control() argument
2125 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2127 dev_err(adev->dev, "Failed to %s GFXCLK DS!\n", enablement ? "enable" : "disable"); in smu_v13_0_deep_sleep_control()
2133 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2135 dev_err(adev->dev, "Failed to %s UCLK DS!\n", enablement ? "enable" : "disable"); in smu_v13_0_deep_sleep_control()
2141 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2143 dev_err(adev->dev, "Failed to %s FCLK DS!\n", enablement ? "enable" : "disable"); in smu_v13_0_deep_sleep_control()
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/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/inc/
Dsmu_v13_0.h259 bool enablement);
275 bool enablement);
278 bool enablement);
Dsmu_v11_0.h298 bool enablement);
301 bool enablement);
Damdgpu_smu.h1256 int (*gfx_ulv_control)(struct smu_context *smu, bool enablement);
1261 int (*deep_sleep_control)(struct smu_context *smu, bool enablement);
1283 int (*gpo_control)(struct smu_context *smu, bool enablement);
/linux-6.6.21/kernel/configs/
Dnopm.config10 # Triggers enablement via hibernate callbacks
/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dsmu_v11_0.c2117 bool enablement) in smu_v11_0_gfx_ulv_control() argument
2122 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement); in smu_v11_0_gfx_ulv_control()
2128 bool enablement) in smu_v11_0_deep_sleep_control() argument
2134 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2136 dev_err(adev->dev, "Failed to %s GFXCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control()
2142 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2144 dev_err(adev->dev, "Failed to %s UCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control()
2150 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2152 dev_err(adev->dev, "Failed to %s FCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control()
2158 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_SOCCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
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/linux-6.6.21/Documentation/gpu/amdgpu/
Dras.rst53 This test checks the RAS availability and enablement status for each supported IP block as well as
/linux-6.6.21/tools/testing/selftests/rcutorture/doc/
DTREE_RCU-kconfig.txt11 CONFIG_NO_HZ_FULL -- Do two, one with partial CPU enablement.
/linux-6.6.21/tools/testing/selftests/user_events/
Dabi_test.c110 TEST_F(user, enablement) { in TEST_F() argument
/linux-6.6.21/Documentation/devicetree/bindings/net/
Damd-xgbe.txt43 - amd,serdes-blwc: Baseline wandering correction enablement
/linux-6.6.21/Documentation/devicetree/bindings/pci/
Dhisilicon,kirin-pcie.yaml55 Clock input enablement GPIOs from PCI devices like Ethernet, M.2 and
/linux-6.6.21/Documentation/devicetree/bindings/dsp/
Dfsl,dsp.yaml83 Phandle to syscon block which provide access for processor enablement
/linux-6.6.21/Documentation/PCI/
Dpci-iov-howto.rst37 Multiple methods are available for SR-IOV enablement.
/linux-6.6.21/arch/arm/boot/dts/st/
Dste-ux500-samsung-janice.dts430 * GPIO-controlled voltage enablement: this drives
503 * The Low Noise Amplifier (LNA) power and enablement is controlled
991 /* Unused power enablement line, used in R0.0 and R0.1 boards */
/linux-6.6.21/Documentation/admin-guide/cifs/
Dtodo.rst118 2) Improve xfstest's cifs/smb3 enablement and adapt xfstests where needed to test
/linux-6.6.21/Documentation/arch/x86/x86_64/
Dfsgs.rst90 FSGSBASE instructions enablement
/linux-6.6.21/Documentation/devicetree/bindings/powerpc/
Dibm,powerpc-cpu-features.txt13 enablement, privilege, and compatibility metadata.
/linux-6.6.21/Documentation/devicetree/bindings/media/i2c/
Dmaxim,max9286.yaml103 available ones controls the remote camera power enablement.
/linux-6.6.21/Documentation/arch/x86/
Dshstk.rst60 on a per-thread basis. The enablement status is inherited on clone, so if the
/linux-6.6.21/drivers/char/tpm/
DKconfig18 userspace enablement piece of the specification, can be
/linux-6.6.21/Documentation/networking/devlink/
Dmlx5.rst22 If the device supports RoCE disablement, RoCE enablement state controls
/linux-6.6.21/Documentation/networking/
Dsfp-phylink.rst216 (speed, duplex and flow control/pause enablement settings) which
/linux-6.6.21/mm/
DKconfig.debug18 Depending on runtime enablement, this results in a small or large

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