Searched refs:dsp_config (Results 1 – 4 of 4) sorted by relevance
199 pll->dsp_config = (dsp_precision << 20) | (pll->dsp_loop_latency << 16) | dsp_xclks; in aty_dsp_gt()202 __func__, pll->dsp_config, pll->dsp_on_off); in aty_dsp_gt()360 aty_st_le32(DSP_CONFIG, pll->ct.dsp_config, par); in aty_set_pll_ct()396 pll->ct.dsp_config = aty_ld_le32(DSP_CONFIG, par); in aty_get_pll_ct()406 u32 dsp_config; in aty_init_pll_ct() local491 dsp_config = aty_ld_le32(DSP_CONFIG, par); in aty_init_pll_ct()496 if (dsp_config) in aty_init_pll_ct()497 pll->ct.dsp_loop_latency = (dsp_config & DSP_LOOP_LATENCY) >> 16; in aty_init_pll_ct()502 (!dsp_config || !((dsp_config ^ vga_dsp_config) & DSP_XCLKS_PER_QW)))) { in aty_init_pll_ct()
96 u32 dsp_config; /* Mach64 GTB DSP */ member
1861 u32 dsp_config = pll->ct.dsp_config; in atyfb_ioctl() local1871 clk.dsp_xclks_per_row = dsp_config & 0x3fff; in atyfb_ioctl()1872 clk.dsp_loop_latency = (dsp_config >> 16) & 0xf; in atyfb_ioctl()1873 clk.dsp_precision = (dsp_config >> 20) & 7; in atyfb_ioctl()1897 pll->ct.dsp_config = (clk.dsp_xclks_per_row & 0x3fff) | in atyfb_ioctl()
1447 int dsp_config; in wm8903_hw_params() local1467 dsp_config = 0; in wm8903_hw_params()1468 best_val = abs(sample_rates[dsp_config].rate - fs); in wm8903_hw_params()1472 dsp_config = i; in wm8903_hw_params()1477 dev_dbg(component->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate); in wm8903_hw_params()1479 clock1 |= sample_rates[dsp_config].value; in wm8903_hw_params()