/linux-6.6.21/drivers/gpu/drm/i915/soc/ |
D | intel_pch.c | 16 drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); in intel_pch_type() 20 drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n"); in intel_pch_type() 25 drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n"); in intel_pch_type() 31 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n"); in intel_pch_type() 38 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n"); in intel_pch_type() 45 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n"); in intel_pch_type() 53 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n"); in intel_pch_type() 61 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n"); in intel_pch_type() 66 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n"); in intel_pch_type() 74 drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n"); in intel_pch_type() [all …]
|
/linux-6.6.21/drivers/gpu/drm/i915/display/ |
D | intel_crtc_state_dump.c | 17 drm_dbg_kms(&i915->drm, "crtc timings: clock=%d, " in intel_dump_crtc_timings() 36 drm_dbg_kms(&i915->drm, in intel_dump_m_n_config() 140 drm_dbg_kms(&i915->drm, in intel_dump_plane_state() 147 drm_dbg_kms(&i915->drm, in intel_dump_plane_state() 152 drm_dbg_kms(&i915->drm, "\trotation: 0x%x, scaler: %d, scaling_filter: %d\n", in intel_dump_plane_state() 155 drm_dbg_kms(&i915->drm, in intel_dump_plane_state() 167 drm_dbg_kms(&i915->drm, in ilk_dump_csc() 172 drm_dbg_kms(&i915->drm, in ilk_dump_csc() 181 drm_dbg_kms(&i915->drm, in ilk_dump_csc() 193 drm_dbg_kms(&i915->drm, in vlv_dump_csc() [all …]
|
D | intel_dsi_vbt.c | 161 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_send_packet() 178 drm_dbg_kms(&dev_priv->drm, "no dsi device for port %c\n", in mipi_exec_send_packet() 238 drm_dbg_kms(&i915->drm, "%d usecs\n", delay); in mipi_exec_delay() 256 drm_dbg_kms(&dev_priv->drm, "unknown gpio index %u\n", in vlv_exec_gpio() 270 drm_dbg_kms(&dev_priv->drm, "SC gpio not supported\n"); in vlv_exec_gpio() 273 drm_dbg_kms(&dev_priv->drm, in vlv_exec_gpio() 319 drm_dbg_kms(&dev_priv->drm, in chv_exec_gpio() 325 drm_dbg_kms(&dev_priv->drm, in chv_exec_gpio() 380 drm_dbg_kms(&dev_priv->drm, "Skipping ICL GPIO element execution\n"); in icl_exec_gpio() 488 drm_dbg_kms(&dev_priv->drm, "GPIO index %u, number %u, source %u, native %s, set to %s\n", in mipi_exec_gpio() [all …]
|
D | intel_lspcon.c | 99 drm_dbg_kms(&i915->drm, "Vendor: Mega Chips\n"); in lspcon_detect_vendor() 104 drm_dbg_kms(&i915->drm, "Vendor: Parade Tech\n"); in lspcon_detect_vendor() 134 drm_dbg_kms(&i915->drm, "HDR capability detection failed\n"); in lspcon_detect_hdr_capability() 137 drm_dbg_kms(&i915->drm, "LSPCON capable of HDR\n"); in lspcon_detect_hdr_capability() 150 drm_dbg_kms(&i915->drm, "Error reading LSPCON mode\n"); in lspcon_get_current_mode() 167 drm_dbg_kms(&i915->drm, "Waiting for LSPCON mode %s to settle\n", in lspcon_wait_mode() 175 drm_dbg_kms(&i915->drm, "Current LSPCON mode %s\n", in lspcon_wait_mode() 197 drm_dbg_kms(&i915->drm, "Current mode = desired LSPCON mode\n"); in lspcon_change_mode() 208 drm_dbg_kms(&i915->drm, "LSPCON mode changed done\n"); in lspcon_change_mode() 220 drm_dbg_kms(&i915->drm, "Native AUX CH down\n"); in lspcon_wake_native_aux_ch() [all …]
|
D | intel_hdcp.c | 135 drm_dbg_kms(&i915->drm, "Bksv is invalid\n"); in intel_hdcp_read_valid_bksv() 181 drm_dbg_kms(&i915->drm, in intel_hdcp2_capable() 581 drm_dbg_kms(&i915->drm, "Invalid number of leftovers %d\n", in intel_hdcp_validate_v_prime() 614 drm_dbg_kms(&i915->drm, "SHA-1 mismatch, HDCP failed\n"); in intel_hdcp_validate_v_prime() 633 drm_dbg_kms(&i915->drm, in intel_hdcp_auth_downstream() 644 drm_dbg_kms(&i915->drm, "Max Topology Limit Exceeded\n"); in intel_hdcp_auth_downstream() 657 drm_dbg_kms(&i915->drm, in intel_hdcp_auth_downstream() 664 drm_dbg_kms(&i915->drm, "Out of mem: ksv_fifo\n"); in intel_hdcp_auth_downstream() 692 drm_dbg_kms(&i915->drm, in intel_hdcp_auth_downstream() 697 drm_dbg_kms(&i915->drm, "HDCP is enabled (%d downstream devices)\n", in intel_hdcp_auth_downstream() [all …]
|
D | intel_fdi.c | 139 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes() 143 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes() 151 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes() 178 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes() 186 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes() 199 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes() 270 drm_dbg_kms(&i915->drm, in ilk_fdi_compute_config() 304 drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n", in cpt_set_fdi_bc_bifurcation() 431 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train() 434 drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n"); in ilk_fdi_link_train() [all …]
|
D | intel_hdcp_gsc.c | 55 drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); in gsc_hdcp_initiate_session() 60 drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", in gsc_hdcp_initiate_session() 115 drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed: %zd\n", byte); in gsc_hdcp_verify_receiver_cert_prepare_km() 120 drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", in gsc_hdcp_verify_receiver_cert_prepare_km() 176 drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); in gsc_hdcp_verify_hprime() 181 drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", in gsc_hdcp_verify_hprime() 225 drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); in gsc_hdcp_store_pairing_info() 230 drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. Status: 0x%X\n", in gsc_hdcp_store_pairing_info() 270 drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); in gsc_hdcp_initiate_locality_check() 275 drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. status: 0x%X\n", in gsc_hdcp_initiate_locality_check() [all …]
|
D | intel_psr.c | 327 drm_dbg_kms(&i915->drm, "PSR exit events: 0x%x\n", val); in psr_event_print() 329 drm_dbg_kms(&i915->drm, "\tPSR2 watchdog timer expired\n"); in psr_event_print() 331 drm_dbg_kms(&i915->drm, "\tPSR2 disabled\n"); in psr_event_print() 333 drm_dbg_kms(&i915->drm, "\tSU dirty FIFO underrun\n"); in psr_event_print() 335 drm_dbg_kms(&i915->drm, "\tSU CRC FIFO underrun\n"); in psr_event_print() 337 drm_dbg_kms(&i915->drm, "\tGraphics reset\n"); in psr_event_print() 339 drm_dbg_kms(&i915->drm, "\tPCH interrupt\n"); in psr_event_print() 341 drm_dbg_kms(&i915->drm, "\tMemory up\n"); in psr_event_print() 343 drm_dbg_kms(&i915->drm, "\tFront buffer modification\n"); in psr_event_print() 345 drm_dbg_kms(&i915->drm, "\tPSR watchdog timer expired\n"); in psr_event_print() [all …]
|
D | intel_bios.c | 382 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n"); in generate_lfp_data_ptrs() 494 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n", in init_bdb_block() 614 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n", in dump_pnp_id() 639 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n", in vbt_get_panel_type() 754 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n", in get_panel_type() 769 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n", in get_panel_type() 818 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); in parse_panel_options() 822 drm_dbg_kms(&i915->drm, in parse_panel_options() 827 drm_dbg_kms(&i915->drm, in parse_panel_options() 856 drm_dbg_kms(&i915->drm, in parse_lfp_panel_dtd() [all …]
|
D | intel_dp.c | 642 drm_dbg_kms(&i915->drm, in intel_dp_get_link_train_fallback_values() 656 drm_dbg_kms(&i915->drm, in intel_dp_get_link_train_fallback_values() 667 drm_dbg_kms(&i915->drm, in intel_dp_get_link_train_fallback_values() 705 drm_dbg_kms(&i915->drm, "Unsupported BPP %u, min %u\n", in intel_dp_dsc_nearest_valid_bpp() 723 drm_dbg_kms(&i915->drm, "Unsupported BPP %u, min 8\n", in intel_dp_dsc_nearest_valid_bpp() 734 drm_dbg_kms(&i915->drm, "Set dsc bpp from %d to VESA %d\n", in intel_dp_dsc_nearest_valid_bpp() 771 drm_dbg_kms(&i915->drm, "Max link bpp is %u for %u timeslots " in intel_dp_dsc_get_output_bpp() 831 drm_dbg_kms(&i915->drm, in intel_dp_dsc_get_slice_count() 857 drm_dbg_kms(&i915->drm, "Unsupported Slice Count %d\n", in intel_dp_dsc_get_slice_count() 1256 drm_dbg_kms(&i915->drm, "source rates: %s\n", str); in intel_dp_print_rates() [all …]
|
D | intel_fbdev.c | 239 drm_dbg_kms(&dev_priv->drm, in intelfb_create() 248 drm_dbg_kms(&dev_priv->drm, in intelfb_create() 255 drm_dbg_kms(&dev_priv->drm, "re-using BIOS fb\n"); in intelfb_create() 333 drm_dbg_kms(&dev_priv->drm, "allocated %dx%d fb: 0x%08x\n", in intelfb_create() 414 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios() 421 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios() 428 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios() 437 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios() 451 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios() 457 drm_dbg_kms(&i915->drm, "checking [PLANE:%d:%s] for BIOS fb\n", in intel_fbdev_init_bios() [all …]
|
D | intel_load_detect.c | 63 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s], [ENCODER:%d:%s]\n", in intel_load_detect_get_pipe() 114 drm_dbg_kms(&dev_priv->drm, in intel_load_detect_get_pipe() 167 drm_dbg_kms(&dev_priv->drm, in intel_load_detect_get_pipe() 175 drm_dbg_kms(&dev_priv->drm, in intel_load_detect_get_pipe() 213 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s], [ENCODER:%d:%s]\n", in intel_load_detect_release_pipe() 222 drm_dbg_kms(&i915->drm, in intel_load_detect_release_pipe()
|
D | intel_dp_hdcp.c | 63 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_write_an_aksv() 79 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_write_an_aksv() 96 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_bksv() 117 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_bstatus() 134 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_bcaps() 167 drm_dbg_kms(&i915->drm, "Read Ri' from DP/AUX failed (%zd)\n", in intel_dp_hdcp_read_ri_prime() 185 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_ksv_ready() 209 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_ksv_fifo() 232 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_v_prime_part() 259 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_check_link() [all …]
|
D | intel_pps.c | 104 drm_dbg_kms(&dev_priv->drm, in vlv_power_sequencer_kick() 228 drm_dbg_kms(&dev_priv->drm, in vlv_power_sequencer_pipe() 334 drm_dbg_kms(&dev_priv->drm, in vlv_initial_power_sequencer_setup() 340 drm_dbg_kms(&dev_priv->drm, in vlv_initial_power_sequencer_setup() 421 drm_dbg_kms(&i915->drm, in pps_initial_setup() 426 drm_dbg_kms(&i915->drm, in pps_initial_setup() 566 drm_dbg_kms(&dev_priv->drm, in intel_pps_check_power_unlocked() 600 drm_dbg_kms(&dev_priv->drm, in wait_panel_status() 617 drm_dbg_kms(&dev_priv->drm, "Wait complete\n"); in wait_panel_status() 625 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] %s wait for panel power on\n", in wait_panel_on() [all …]
|
D | intel_backlight.c | 108 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] set backlight PWM = %d\n", in intel_backlight_set_pwm_level() 287 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] set backlight level = %d\n", in intel_panel_actually_set_backlight() 350 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] CPU backlight was enabled, disabling\n", in lpt_disable_backlight() 449 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Skipping backlight disable on vga switch\n", in intel_backlight_disable() 474 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] PCH backlight already enabled\n", in lpt_enable_backlight() 519 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] CPU backlight already enabled\n", in pch_enable_backlight() 527 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] PCH backlight already enabled\n", in pch_enable_backlight() 566 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n", in i9xx_enable_backlight() 607 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n", in i965_enable_backlight() 643 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n", in vlv_enable_backlight() [all …]
|
D | intel_crt.c | 448 drm_dbg_kms(&dev_priv->drm, in hsw_crt_compute_config() 482 drm_dbg_kms(&dev_priv->drm, in ilk_crt_detect_hotplug() 495 drm_dbg_kms(&dev_priv->drm, in ilk_crt_detect_hotplug() 510 drm_dbg_kms(&dev_priv->drm, "ironlake hotplug adpa=0x%x, result %d\n", in ilk_crt_detect_hotplug() 541 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug() 550 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug() 562 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug() 603 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_hotplug() 627 drm_dbg_kms(connector->dev, in intel_crt_get_edid() 676 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_ddc() [all …]
|
D | intel_vdsc.c | 256 drm_dbg_kms(&dev_priv->drm, "Slice dimension requirements not met\n"); in intel_dsc_compute_params() 396 drm_dbg_kms(&dev_priv->drm, "PPS0 = 0x%08x\n", pps_val); in intel_dsc_pps_configure() 420 drm_dbg_kms(&dev_priv->drm, "PPS1 = 0x%08x\n", pps_val); in intel_dsc_pps_configure() 445 drm_dbg_kms(&dev_priv->drm, "PPS2 = 0x%08x\n", pps_val); in intel_dsc_pps_configure() 470 drm_dbg_kms(&dev_priv->drm, "PPS3 = 0x%08x\n", pps_val); in intel_dsc_pps_configure() 495 drm_dbg_kms(&dev_priv->drm, "PPS4 = 0x%08x\n", pps_val); in intel_dsc_pps_configure() 520 drm_dbg_kms(&dev_priv->drm, "PPS5 = 0x%08x\n", pps_val); in intel_dsc_pps_configure() 547 drm_dbg_kms(&dev_priv->drm, "PPS6 = 0x%08x\n", pps_val); in intel_dsc_pps_configure() 572 drm_dbg_kms(&dev_priv->drm, "PPS7 = 0x%08x\n", pps_val); in intel_dsc_pps_configure() 597 drm_dbg_kms(&dev_priv->drm, "PPS8 = 0x%08x\n", pps_val); in intel_dsc_pps_configure() [all …]
|
D | vlv_dsi_pll.c | 187 drm_dbg_kms(&dev_priv->drm, "dsi_calc_mnp failed\n"); in vlv_dsi_pll_compute() 199 drm_dbg_kms(&dev_priv->drm, "dsi pll div %08x, ctrl %08x\n", in vlv_dsi_pll_compute() 218 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_pll_enable() 243 drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n"); in vlv_dsi_pll_enable() 251 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_pll_disable() 306 drm_dbg_kms(&dev_priv->drm, "\n"); in bxt_dsi_pll_disable() 326 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_get_pclk() 510 drm_dbg_kms(&dev_priv->drm, "DSI PLL calculation is Done!!\n"); in bxt_dsi_pll_compute() 543 drm_dbg_kms(&dev_priv->drm, "\n"); in bxt_dsi_pll_enable() 568 drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n"); in bxt_dsi_pll_enable()
|
D | intel_bw.c | 295 drm_dbg_kms(&dev_priv->drm, in icl_get_qgv_points() 309 drm_dbg_kms(&dev_priv->drm, in icl_get_qgv_points() 398 drm_dbg_kms(&dev_priv->drm, in icl_get_bw_info() 436 drm_dbg_kms(&dev_priv->drm, in icl_get_bw_info() 469 drm_dbg_kms(&dev_priv->drm, in tgl_get_bw_info() 541 drm_dbg_kms(&dev_priv->drm, in tgl_get_bw_info() 552 drm_dbg_kms(&dev_priv->drm, in tgl_get_bw_info() 738 drm_dbg_kms(&i915->drm, "pipe %c data rate %u num active planes %u\n", in intel_bw_crtc_update() 828 drm_dbg_kms(&i915->drm, "No SAGV, use UINT_MAX as peak bw."); in mtl_find_qgv_points() 854 drm_dbg_kms(&i915->drm, "QGV point %d: max bw %d required %d qgv_peak_bw: %d\n", in mtl_find_qgv_points() [all …]
|
D | intel_hdmi.c | 682 drm_dbg_kms(encoder->base.dev, in intel_read_infoframe() 688 drm_dbg_kms(encoder->base.dev, in intel_read_infoframe() 835 drm_dbg_kms(&dev_priv->drm, in intel_hdmi_compute_drm_infoframe() 876 drm_dbg_kms(&dev_priv->drm, in g4x_set_infoframes() 890 drm_dbg_kms(&dev_priv->drm, in g4x_set_infoframes() 1250 drm_dbg_kms(&dev_priv->drm, "%s DP dual mode adaptor TMDS output\n", in intel_dp_dual_mode_set_tmds_output() 1331 drm_dbg_kms(&i915->drm, "Write An over DDC failed (%d)\n", in intel_hdmi_hdcp_write_an_aksv() 1338 drm_dbg_kms(&i915->drm, "Failed to output aksv (%d)\n", ret); in intel_hdmi_hdcp_write_an_aksv() 1353 drm_dbg_kms(&i915->drm, "Read Bksv over DDC failed (%d)\n", in intel_hdmi_hdcp_read_bksv() 1368 drm_dbg_kms(&i915->drm, "Read bstatus over DDC failed (%d)\n", in intel_hdmi_hdcp_read_bstatus() [all …]
|
D | skl_scaler.c | 135 drm_dbg_kms(&dev_priv->drm, in skl_update_scaler() 155 drm_dbg_kms(&dev_priv->drm, in skl_update_scaler() 167 drm_dbg_kms(&dev_priv->drm, in skl_update_scaler() 204 drm_dbg_kms(&dev_priv->drm, in skl_update_scaler() 220 drm_dbg_kms(&dev_priv->drm, in skl_update_scaler() 229 drm_dbg_kms(&dev_priv->drm, "scaler_user index %u.%u: " in skl_update_scaler() 299 drm_dbg_kms(&dev_priv->drm, in skl_update_scaler_plane() 341 drm_dbg_kms(&dev_priv->drm, in skl_update_scaler_plane() 467 drm_dbg_kms(&dev_priv->drm, in intel_atomic_setup_scaler() 477 drm_dbg_kms(&dev_priv->drm, "Attached scaler id %u.%u to %s:%d\n", in intel_atomic_setup_scaler() [all …]
|
/linux-6.6.21/drivers/gpu/drm/ |
D | drm_framebuffer.c | 90 drm_dbg_kms(fb->dev, "Invalid source coordinates " in drm_framebuffer_check_src_coords() 128 drm_dbg_kms(dev, "bad {bpp:%d, depth:%d}\n", or->bpp, or->depth); in drm_mode_addfb() 180 drm_dbg_kms(dev, "bad framebuffer format %p4cc\n", in framebuffer_check() 186 drm_dbg_kms(dev, "bad framebuffer width %u\n", r->width); in framebuffer_check() 191 drm_dbg_kms(dev, "bad framebuffer height %u\n", r->height); in framebuffer_check() 205 drm_dbg_kms(dev, "Format requires non-linear modifier for plane %d\n", i); in framebuffer_check() 210 drm_dbg_kms(dev, "no buffer object handle for plane %d\n", i); in framebuffer_check() 221 drm_dbg_kms(dev, "bad pitch %u for plane %d\n", r->pitches[i], i); in framebuffer_check() 226 drm_dbg_kms(dev, "bad fb modifier %llu for plane %d\n", in framebuffer_check() 233 drm_dbg_kms(dev, "bad fb modifier %llu for plane %d\n", in framebuffer_check() [all …]
|
/linux-6.6.21/drivers/gpu/drm/display/ |
D | drm_dp_dual_mode_helper.c | 228 drm_dbg_kms(dev, "DP dual mode HDMI ID: %*pE (err %zd)\n", in drm_dp_dual_mode_detect() 235 drm_dbg_kms(dev, "DP dual mode adaptor ID: %02x (err %zd)\n", adaptor_id, ret); in drm_dp_dual_mode_detect() 297 drm_dbg_kms(dev, "Failed to query max TMDS clock\n"); in drm_dp_dual_mode_max_tmds_clock() 337 drm_dbg_kms(dev, "Failed to query state of TMDS output buffers\n"); in drm_dp_dual_mode_get_tmds_output() 381 drm_dbg_kms(dev, "Failed to %s TMDS output buffers (%d attempts)\n", in drm_dp_dual_mode_set_tmds_output() 389 drm_dbg_kms(dev, in drm_dp_dual_mode_set_tmds_output() 399 drm_dbg_kms(dev, "I2C write value mismatch during TMDS output buffer %s\n", in drm_dp_dual_mode_set_tmds_output() 471 drm_dbg_kms(dev, "LSPCON read(0x80, 0x41) failed\n"); in drm_lspcon_get_mode() 527 drm_dbg_kms(dev, "LSPCON mode changed to %s\n", in drm_lspcon_set_mode()
|
D | drm_scdc_helper.c | 160 drm_dbg_kms(connector->dev, in drm_scdc_get_scrambling_status() 190 drm_dbg_kms(connector->dev, in drm_scdc_set_scrambling() 203 drm_dbg_kms(connector->dev, in drm_scdc_set_scrambling() 250 drm_dbg_kms(connector->dev, in drm_scdc_set_high_tmds_clock_ratio() 263 drm_dbg_kms(connector->dev, in drm_scdc_set_high_tmds_clock_ratio()
|
D | drm_dp_helper.c | 229 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us() 241 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us() 254 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us() 329 drm_dbg_kms(aux->drm_dev, "%s: failed rd interval read\n", in __read_delay() 568 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up. First error: %d\n", in drm_dp_dpcd_access() 842 drm_dbg_kms(aux->drm_dev, "%s: Source DUT does not support TEST_EDID_READ\n", in drm_dp_send_real_edid_checksum() 908 drm_dbg_kms(aux->drm_dev, in drm_dp_read_extended_dpcd_caps() 917 drm_dbg_kms(aux->drm_dev, "%s: Base DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_extended_dpcd_caps() 952 drm_dbg_kms(aux->drm_dev, "%s: DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_dpcd_caps() 1001 drm_dbg_kms(aux->drm_dev, "%s: DPCD DFP: %*ph\n", aux->name, len, downstream_ports); in drm_dp_read_downstream_info() [all …]
|