/linux-6.6.21/drivers/clk/rockchip/ |
D | clk.h | 495 int div_shift, int div_width, 540 u8 div_shift; member 563 .div_shift = ds, \ 585 .div_shift = ds, \ 603 .div_shift = ds, \ 621 .div_shift = ds, \ 661 .div_shift = ds, \ 680 .div_shift = ds, \ 696 .div_shift = 16, \ 713 .div_shift = 16, \ [all …]
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D | clk-ddr.c | 21 int div_shift; member 94 int div_shift, int div_width, in rockchip_clk_register_ddrclk() argument 129 ddrclk->div_shift = div_shift; in rockchip_clk_register_ddrclk()
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D | clk.c | 43 int div_offset, u8 div_shift, u8 div_width, u8 div_flags, in rockchip_clk_register_branch() argument 97 div->shift = div_shift; in rockchip_clk_register_branch() 475 list->div_shift, list->div_width, in rockchip_clk_register_branches() 482 list->div_shift, list->div_width, in rockchip_clk_register_branches() 499 list->mux_flags, list->div_shift, in rockchip_clk_register_branches() 519 list->div_shift, list->div_width, in rockchip_clk_register_branches() 529 list->div_shift in rockchip_clk_register_branches() 537 list->div_shift, list->div_flags, &ctx->lock); in rockchip_clk_register_branches() 543 list->div_shift, list->div_width, in rockchip_clk_register_branches() 552 list->mux_width, list->div_shift, in rockchip_clk_register_branches()
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D | clk-half-divider.c | 163 u8 div_shift, u8 div_width, in rockchip_clk_register_halfdiv() argument 209 div->shift = div_shift; in rockchip_clk_register_halfdiv()
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/linux-6.6.21/drivers/clk/ |
D | clk-en7523.c | 40 u8 div_shift; member 68 .div_shift = 0, 81 .div_shift = 0, 94 .div_shift = 0, 108 .div_shift = 24, 120 .div_shift = 8, 134 .div_shift = 0, 181 val >>= desc->div_shift; in en7523_get_div()
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D | clk-sp7021.c | 52 int div_shift; member 473 u32 fbdiv = ((reg >> clk->div_shift) & ((1 << clk->div_width) - 1)) + 1; in sp_pll_recalc_rate() 498 u32 mask = GENMASK(clk->div_shift + clk->div_width - 1, clk->div_shift); in sp_pll_set_rate() 501 reg |= ((fbdiv - 1) << clk->div_shift) & mask; in sp_pll_set_rate() 576 pll->div_shift = shift; in sp_pll_register()
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D | clk-bm1880.c | 120 s8 div_shift; member 152 .div_shift = _div_shift, \ 168 .div_shift = -1, \ 803 if (clks->div_shift >= 0) { in bm1880_clk_register_composite() 812 div_hws->div.shift = clks->div_shift; in bm1880_clk_register_composite()
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D | clk-k210.c | 35 u8 div_shift; member 55 .div_shift = (_shift), \ 760 div_val = (reg >> cfg->div_shift) & GENMASK(cfg->div_width - 1, 0); in k210_clk_get_rate()
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/linux-6.6.21/sound/soc/fsl/ |
D | fsl_mqs.c | 57 int div_shift; member 97 (div - 1) << mqs_priv->soc->div_shift); in fsl_mqs_hw_params() 318 .div_shift = MQS_CLK_DIV_SHIFT, 331 .div_shift = IMX6SX_GPR2_MQS_CLK_DIV_SHIFT, 344 .div_shift = 8,
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/linux-6.6.21/drivers/clk/x86/ |
D | clk-cgu.h | 182 u8 div_shift; member 232 .div_shift = _shift, \ 272 .div_shift = _shift, \ 292 .div_shift = _shift, \
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D | clk-cgu.c | 30 lgm_set_clk_val(ctx->membase, list->div_off, list->div_shift, in lgm_clk_register_fixed() 199 u8 shift = list->div_shift; in lgm_clk_register_divider() 251 lgm_set_clk_val(ctx->membase, list->div_off, list->div_shift, in lgm_clk_register_fixed_factor()
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/linux-6.6.21/drivers/clk/imx/ |
D | clk-pllv3.c | 53 u32 div_shift; member 115 u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; in clk_pllv3_recalc_rate() 143 val &= ~(pll->div_mask << pll->div_shift); in clk_pllv3_set_rate() 144 val |= (div << pll->div_shift); in clk_pllv3_set_rate() 439 pll->div_shift = 1; in imx_clk_hw_pllv3()
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/linux-6.6.21/drivers/clk/mediatek/ |
D | clk-mtk.h | 190 unsigned char div_shift; member 201 .div_shift = _shift, \
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D | clk-mt8167-apmixedsys.c | 82 .div_shift = _shift, \
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D | clk-mt8516.c | 474 .div_shift = _shift, \
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D | clk-mt8167.c | 663 .div_shift = _shift, \
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D | clk-mt8365.c | 547 .div_shift = _shift, \
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D | clk-mtk.c | 417 mcd->flags, base + mcd->div_reg, mcd->div_shift, in mtk_clk_register_dividers()
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/linux-6.6.21/drivers/clk/at91/ |
D | clk-sam9x60-pll.c | 346 (div << core->layout->div_shift) | ena_val); in sam9x60_div_pll_set_div() 367 cdiv = (val & core->layout->div_mask) >> core->layout->div_shift; in sam9x60_div_pll_set() 513 cdiv = (val & core->layout->div_mask) >> core->layout->div_shift; in sam9x60_div_pll_set_rate_chg() 569 cdiv = (val & core.layout->div_mask) >> core.layout->div_shift; in sam9x60_div_pll_notifier_fn()
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D | pmc.h | 65 u8 div_shift; member
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D | sam9x60.c | 56 .div_shift = 0,
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D | sama7g5.c | 93 .div_shift = 0, 101 .div_shift = 12,
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/linux-6.6.21/drivers/clk/tegra/ |
D | clk-tegra-periph.c | 832 u8 div_shift; member 843 .div_shift = _div_shift,\ 967 data->div_shift, 8, 1, data->lock); in init_pllp()
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/linux-6.6.21/drivers/mfd/ |
D | db8500-prcmu.c | 523 u32 div_shift; member 530 .div_shift = PRCM_DSITVCLK_DIV_DSI0_ESC_CLK_DIV_SHIFT, 535 .div_shift = PRCM_DSITVCLK_DIV_DSI1_ESC_CLK_DIV_SHIFT, 540 .div_shift = PRCM_DSITVCLK_DIV_DSI2_ESC_CLK_DIV_SHIFT, 1534 div = ((div & dsiescclk[n].div_mask) >> (dsiescclk[n].div_shift)); in dsiescclk_rate() 1899 val |= (min(div, (u32)255) << dsiescclk[n].div_shift); in set_dsiescclk_rate()
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