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Searched refs:dim0 (Results 1 – 6 of 6) sorted by relevance

/linux-6.6.21/arch/alpha/kernel/ !
Dsys_titan.c68 volatile unsigned long *dim0, *dim1, *dim2, *dim3; in titan_update_irq_hw() local
83 dim0 = &cchip->dim0.csr; in titan_update_irq_hw()
87 if (!cpumask_test_cpu(0, &cpm)) dim0 = &dummy; in titan_update_irq_hw()
92 *dim0 = mask0; in titan_update_irq_hw()
97 *dim0; in titan_update_irq_hw()
103 dimB = &cchip->dim0.csr; in titan_update_irq_hw()
Dsys_dp264.c54 volatile unsigned long *dim0, *dim1, *dim2, *dim3; in tsunami_update_irq_hw() local
68 dim0 = &cchip->dim0.csr; in tsunami_update_irq_hw()
72 if (!cpu_possible(0)) dim0 = &dummy; in tsunami_update_irq_hw()
77 *dim0 = mask0; in tsunami_update_irq_hw()
82 *dim0; in tsunami_update_irq_hw()
88 if (bcpu == 0) dimB = &cchip->dim0.csr; in tsunami_update_irq_hw()
Dcore_tsunami.c399 printk("%s: CSR_DIM0 0x%lx\n", __func__, TSUNAMI_cchip->dim0.csr); in tsunami_init_arch()
Dcore_titan.c375 printk("%s: CSR_DIM0 0x%lx\n", __func__, TITAN_cchip->dim0.csr); in titan_init_arch()
/linux-6.6.21/arch/alpha/include/asm/ !
Dcore_tsunami.h43 tsunami_64 dim0; member
Dcore_titan.h44 titan_64 dim0; member