Home
last modified time | relevance | path

Searched refs:cycle (Results 1 – 25 of 430) sorted by relevance

12345678910>>...18

/linux-6.6.21/drivers/staging/vme_user/
Dvme_fake.c49 u32 cycle; member
57 u32 cycle; member
156 dma_addr_t buf_base, u32 aspace, u32 cycle) in fake_slave_set() argument
213 bridge->slaves[i].cycle = cycle; in fake_slave_set()
225 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in fake_slave_get() argument
241 *cycle = bridge->slaves[i].cycle; in fake_slave_get()
253 u32 aspace, u32 cycle, u32 dwidth) in fake_master_set() argument
321 bridge->masters[i].cycle = cycle; in fake_master_set()
339 u32 *aspace, u32 *cycle, u32 *dwidth) in __fake_master_get() argument
352 *cycle = bridge->masters[i].cycle; in __fake_master_get()
[all …]
Dvme_tsi148.c468 dma_addr_t pci_base, u32 aspace, u32 cycle) in tsi148_slave_set() argument
554 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { in tsi148_slave_set()
568 if (cycle & VME_BLT) in tsi148_slave_set()
570 if (cycle & VME_MBLT) in tsi148_slave_set()
572 if (cycle & VME_2eVME) in tsi148_slave_set()
574 if (cycle & VME_2eSST) in tsi148_slave_set()
576 if (cycle & VME_2eSSTB) in tsi148_slave_set()
584 if (cycle & VME_SUPER) in tsi148_slave_set()
586 if (cycle & VME_USER) in tsi148_slave_set()
588 if (cycle & VME_PROG) in tsi148_slave_set()
[all …]
Dvme.c167 u32 aspace, cycle, dwidth; in vme_get_size() local
172 &aspace, &cycle, &dwidth); in vme_get_size()
179 &buf_base, &aspace, &cycle); in vme_get_size()
282 u32 cycle) in vme_slave_request() argument
309 ((slave_image->cycle_attr & cycle) == cycle) && in vme_slave_request()
362 dma_addr_t buf_base, u32 aspace, u32 cycle) in vme_slave_set() argument
381 ((image->cycle_attr & cycle) == cycle))) { in vme_slave_set()
391 aspace, cycle); in vme_slave_set()
412 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in vme_slave_get() argument
430 aspace, cycle); in vme_slave_get()
[all …]
/linux-6.6.21/drivers/ata/
Dlibata-pata-timings.c70 q->cycle = EZ(t->cycle, T); in ata_timing_quantize()
92 m->cycle = max(a->cycle, b->cycle); in ata_timing_merge()
141 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; in ata_timing_compute()
144 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; in ata_timing_compute()
146 p.cycle = id[ATA_ID_EIDE_DMA_MIN]; in ata_timing_compute()
177 if (t->active + t->recover < t->cycle) { in ata_timing_compute()
178 t->active += (t->cycle - (t->active + t->recover)) / 2; in ata_timing_compute()
179 t->recover = t->cycle - t->active; in ata_timing_compute()
187 if (t->active + t->recover > t->cycle) in ata_timing_compute()
188 t->cycle = t->active + t->recover; in ata_timing_compute()
Dpata_icside.c192 unsigned int cycle; in pata_icside_set_dmamode() local
205 if (t.active <= 50 && t.recover <= 375 && t.cycle <= 425) { in pata_icside_set_dmamode()
207 cycle = 187; in pata_icside_set_dmamode()
208 } else if (t.active <= 125 && t.recover <= 375 && t.cycle <= 500) { in pata_icside_set_dmamode()
210 cycle = 250; in pata_icside_set_dmamode()
211 } else if (t.active <= 200 && t.recover <= 550 && t.cycle <= 750) { in pata_icside_set_dmamode()
213 cycle = 437; in pata_icside_set_dmamode()
216 cycle = 562; in pata_icside_set_dmamode()
220 t.active, t.recover, t.cycle, iomd_type); in pata_icside_set_dmamode()
222 state->port[ap->port_no].speed[adev->devno] = cycle; in pata_icside_set_dmamode()
/linux-6.6.21/arch/alpha/lib/
Dev6-csum_ipv6_magic.S116 cmpult $20,$3,$3 # E : (1 cycle stall on $20)
117 addq $20,$18,$20 # E : U L U L (1 cycle stall on $20)
120 addq $20,$19,$20 # E : (1 cycle stall on $20)
125 addq $18,$19,$18 # E : (1 cycle stall on $19)
131 zapnot $0,15,$1 # U : Start folding output (1 cycle stall on $0)
133 srl $0,32,$0 # U : U L U L : (1 cycle stall on $0)
136 extwl $1,2,$2 # U : ushort[1] (1 cycle stall on $1)
137 zapnot $1,3,$0 # U : ushort[0] (1 cycle stall on $1)
138 extwl $1,4,$1 # U : ushort[2] (1 cycle stall on $1)
143 extwl $3,2,$1 # U : ushort[1] (1 cycle stall on $3)
[all …]
/linux-6.6.21/scripts/
Dheaderdep.pl116 my $cycle = shift;
119 for my $i (0 .. $#$cycle - 1) {
120 $cycle->[$i]->[0] = $cycle->[$i + 1]->[0];
122 $cycle->[-1]->[0] = 0;
124 my $first = shift @$cycle;
125 my $last = pop @$cycle;
130 for my $header (reverse @$cycle) {
/linux-6.6.21/kernel/locking/
Dtest-ww_mutex.c288 struct test_cycle *cycle = container_of(work, typeof(*cycle), work); in test_cycle_work() local
293 ww_mutex_lock(&cycle->a_mutex, &ctx); in test_cycle_work()
295 complete(cycle->a_signal); in test_cycle_work()
296 wait_for_completion(&cycle->b_signal); in test_cycle_work()
298 err = ww_mutex_lock(cycle->b_mutex, &ctx); in test_cycle_work()
301 ww_mutex_unlock(&cycle->a_mutex); in test_cycle_work()
302 ww_mutex_lock_slow(cycle->b_mutex, &ctx); in test_cycle_work()
303 erra = ww_mutex_lock(&cycle->a_mutex, &ctx); in test_cycle_work()
307 ww_mutex_unlock(cycle->b_mutex); in test_cycle_work()
309 ww_mutex_unlock(&cycle->a_mutex); in test_cycle_work()
[all …]
/linux-6.6.21/drivers/clocksource/
Dtimer-atmel-pit.c43 u32 cycle; member
85 elapsed += PIT_PICNT(t) * data->cycle; in read_pit_clk()
95 pit_write(data->base, AT91_PIT_MR, (data->cycle - 1) | AT91_PIT_PITEN); in pit_clkevt_shutdown()
107 data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, AT91_PIT_PIVR)); in pit_clkevt_set_periodic()
109 (data->cycle - 1) | AT91_PIT_PITEN | AT91_PIT_PITIEN); in pit_clkevt_set_periodic()
132 (data->cycle - 1) | AT91_PIT_PITEN); in at91sam926x_pit_reset()
153 data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, in at91sam926x_pit_interrupt()
210 data->cycle = DIV_ROUND_CLOSEST(pit_rate, HZ); in at91sam926x_pit_dt_init()
211 WARN_ON(((data->cycle - 1) & ~AT91_PIT_PIV) != 0); in at91sam926x_pit_dt_init()
220 bits = 12 /* PICNT */ + ilog2(data->cycle) /* PIV */; in at91sam926x_pit_dt_init()
/linux-6.6.21/Documentation/devicetree/bindings/input/
Dpwm-vibrator.yaml14 strength increases based on the duty cycle of the enable PWM channel
15 (100% duty cycle meaning strongest vibration, 0% meaning no vibration).
18 driven at fixed duty cycle. If available this is can be used to increase
39 direction-duty-cycle-ns:
41 Duty cycle of the direction PWM channel in nanoseconds,
58 direction-duty-cycle-ns = <1000000000>;
/linux-6.6.21/tools/power/cpupower/bench/
Dbenchmark.c80 unsigned int _round, cycle; in start_benchmark() local
125 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark()
151 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark()
/linux-6.6.21/drivers/pwm/
Dpwm-sl28cpld.c130 unsigned int cycle, prescaler; in sl28cpld_pwm_apply() local
153 cycle = SL28CPLD_PWM_FROM_DUTY_CYCLE(state->duty_cycle); in sl28cpld_pwm_apply()
154 cycle = min_t(unsigned int, cycle, SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler)); in sl28cpld_pwm_apply()
164 if (cycle == SL28CPLD_PWM_MAX_DUTY_CYCLE(0)) { in sl28cpld_pwm_apply()
167 cycle = SL28CPLD_PWM_MAX_DUTY_CYCLE(1); in sl28cpld_pwm_apply()
182 ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CYCLE, cycle); in sl28cpld_pwm_apply()
192 ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CYCLE, cycle); in sl28cpld_pwm_apply()
/linux-6.6.21/fs/xfs/
Dxfs_log_priv.h533 xlog_crack_atomic_lsn(atomic64_t *lsn, uint *cycle, uint *block) in xlog_crack_atomic_lsn() argument
537 *cycle = CYCLE_LSN(val); in xlog_crack_atomic_lsn()
545 xlog_assign_atomic_lsn(atomic64_t *lsn, uint cycle, uint block) in xlog_assign_atomic_lsn() argument
547 atomic64_set(lsn, xlog_assign_lsn(cycle, block)); in xlog_assign_atomic_lsn()
556 xlog_crack_grant_head_val(int64_t val, int *cycle, int *space) in xlog_crack_grant_head_val() argument
558 *cycle = val >> 32; in xlog_crack_grant_head_val()
563 xlog_crack_grant_head(atomic64_t *head, int *cycle, int *space) in xlog_crack_grant_head() argument
565 xlog_crack_grant_head_val(atomic64_read(head), cycle, space); in xlog_crack_grant_head()
569 xlog_assign_grant_head_val(int cycle, int space) in xlog_assign_grant_head_val() argument
571 return ((int64_t)cycle << 32) | space; in xlog_assign_grant_head_val()
[all …]
Dxfs_sysfs.c348 int cycle; in log_head_lsn_show() local
353 cycle = log->l_curr_cycle; in log_head_lsn_show()
357 return sysfs_emit(buf, "%d:%d\n", cycle, block); in log_head_lsn_show()
366 int cycle; in log_tail_lsn_show() local
370 xlog_crack_atomic_lsn(&log->l_tail_lsn, &cycle, &block); in log_tail_lsn_show()
371 return sysfs_emit(buf, "%d:%d\n", cycle, block); in log_tail_lsn_show()
381 int cycle; in reserve_grant_head_show() local
385 xlog_crack_grant_head(&log->l_reserve_head.grant, &cycle, &bytes); in reserve_grant_head_show()
386 return sysfs_emit(buf, "%d:%d\n", cycle, bytes); in reserve_grant_head_show()
395 int cycle; in write_grant_head_show() local
[all …]
/linux-6.6.21/sound/firewire/
Damdtp-stream.c477 static unsigned int compute_syt_offset(unsigned int syt, unsigned int cycle, in compute_syt_offset() argument
480 unsigned int cycle_lo = (cycle % CYCLES_PER_SECOND) & 0x0f; in compute_syt_offset()
527 dst->syt_offset = compute_syt_offset(src->syt, src->cycle, transfer_delay); in cache_seq()
680 static void build_it_pkt_header(struct amdtp_stream *s, unsigned int cycle, in build_it_pkt_header() argument
700 trace_amdtp_packet(s, cycle, cip_header, payload_length + header_length, data_blocks, in build_it_pkt_header()
799 static int parse_ir_ctx_header(struct amdtp_stream *s, unsigned int cycle, in parse_ir_ctx_header() argument
848 trace_amdtp_packet(s, cycle, cip_header, payload_length, *data_blocks, in parse_ir_ctx_header()
868 static inline u32 increment_ohci_cycle_count(u32 cycle, unsigned int addend) in increment_ohci_cycle_count() argument
870 cycle += addend; in increment_ohci_cycle_count()
871 if (cycle >= OHCI_SECOND_MODULUS * CYCLES_PER_SECOND) in increment_ohci_cycle_count()
[all …]
/linux-6.6.21/Documentation/devicetree/bindings/regulator/
Dpwm-regulator.yaml19 duty-cycle values must be provided via DT. Limitations are that the
21 Intermediary duty-cycle values which would normally allow finer grained
29 appropriate duty-cycle values. This allows for a much more fine grained
31 make an assumption that a %50 duty-cycle value will cause the regulator
54 - description: duty-cycle in percent (%)
63 Integer value encoding the duty cycle unit. If not
75 Duty cycle values are expressed in pwm-dutycycle-unit.
104 * Inverted PWM logic, and the duty cycle range is limited
/linux-6.6.21/Documentation/admin-guide/perf/
Dalibaba_pmu.rst27 pmu_cycle_cnt_low and pmu_cycle_cnt_high, that is used as the cycle count
61 -e ali_drw_21000/cycle/ \
65 -e ali_drw_21080/cycle/ \
69 -e ali_drw_23000/cycle/ \
73 -e ali_drw_23080/cycle/ \
77 -e ali_drw_25000/cycle/ \
81 -e ali_drw_25080/cycle/ \
85 -e ali_drw_27000/cycle/ \
89 -e ali_drw_27080/cycle/ -- sleep 10
/linux-6.6.21/arch/mips/dec/
Dkn02xa-berr.c53 const char *kind, *agent, *cycle, *event; in dec_kn02xa_be_backend() local
72 cycle = mreadstr; in dec_kn02xa_be_backend()
75 cycle = invoker ? writestr : readstr; in dec_kn02xa_be_backend()
84 kind, agent, cycle, event, address); in dec_kn02xa_be_backend()
Dkn01-berr.c81 const char *kind, *agent, *cycle, *event; in dec_kn01_be_backend() local
126 cycle = mreadstr; in dec_kn01_be_backend()
129 cycle = invoker ? writestr : readstr; in dec_kn01_be_backend()
138 kind, agent, cycle, event, address); in dec_kn01_be_backend()
/linux-6.6.21/Documentation/hwmon/
Ddme1737.rst167 cycle) of the input. The chip adjusts the sampling rate based on this value.
178 manual mode, the fan speed is set by writing the duty-cycle value to the
180 current duty-cycle as set by the fan controller in the chip. All PWM outputs
198 pwm[1-3]_auto_point2_pwm full-speed duty-cycle (255, i.e., 100%)
199 pwm[1-3]_auto_point1_pwm low-speed duty-cycle
200 pwm[1-3]_auto_pwm_min min-speed duty-cycle
208 The chip adjusts the output duty-cycle linearly in the range of auto_point1_pwm
211 auto_point1_temp_hyst value, the output duty-cycle is set to the auto_pwm_min
214 duty-cycle. If any of the temperatures rise above the auto_point3_temp value,
215 all PWM outputs are set to 100% duty-cycle.
[all …]
Dvt1211.rst196 pwm[1-2]_auto_point4_pwm full speed duty-cycle (hard-wired to 255)
197 pwm[1-2]_auto_point3_pwm high speed duty-cycle
198 pwm[1-2]_auto_point2_pwm low speed duty-cycle
199 pwm[1-2]_auto_point1_pwm off duty-cycle (hard-wired to 0)
212 PWM output duty-cycle based on the input temperature:
218 - full speed duty-cycle full speed duty-cycle
220 - high speed duty-cycle full speed duty-cycle
222 - low speed duty-cycle high speed duty-cycle
224 - off duty-cycle low speed duty-cycle
/linux-6.6.21/Documentation/devicetree/bindings/spi/
Drenesas,sh-msiof.yaml118 - 50 # 0.5-clock-cycle delay
119 - 100 # 1-clock-cycle delay
120 - 150 # 1.5-clock-cycle delay
121 - 200 # 2-clock-cycle delay
128 - 50 # 0.5-clock-cycle delay
129 - 100 # 1-clock-cycle delay
130 - 150 # 1.5-clock-cycle delay
131 - 200 # 2-clock-cycle delay
132 - 300 # 3-clock-cycle delay
/linux-6.6.21/drivers/mfd/
Datmel-smc.c229 conf->cycle &= ~GENMASK(shift + 15, shift); in atmel_smc_cs_conf_set_cycle()
230 conf->cycle |= val << shift; in atmel_smc_cs_conf_set_cycle()
250 regmap_write(regmap, ATMEL_SMC_CYCLE(cs), conf->cycle); in atmel_smc_cs_conf_apply()
271 regmap_write(regmap, ATMEL_HSMC_CYCLE(layout, cs), conf->cycle); in atmel_hsmc_cs_conf_apply()
291 regmap_read(regmap, ATMEL_SMC_CYCLE(cs), &conf->cycle); in atmel_smc_cs_conf_get()
312 regmap_read(regmap, ATMEL_HSMC_CYCLE(layout, cs), &conf->cycle); in atmel_hsmc_cs_conf_get()
/linux-6.6.21/Documentation/ABI/testing/
Dsysfs-fs-xfs7 log. The LSN is exported in "cycle:basic block" format.
16 log. The LSN is exported in "cycle:basic block" format.
26 "cycle:bytes" format.
38 "cycle:bytes" format.
/linux-6.6.21/drivers/net/ethernet/intel/igc/
Digc_tsn.c118 u32 sec, nsec, cycle; in igc_tsn_enable_offload() local
254 cycle = adapter->cycle_time; in igc_tsn_enable_offload()
262 s64 n = div64_s64(ktime_sub_ns(systim, base_time), cycle); in igc_tsn_enable_offload()
264 base_time = ktime_add_ns(base_time, (n + 1) * cycle); in igc_tsn_enable_offload()
297 wr32(IGC_QBVCYCLET_S, cycle); in igc_tsn_enable_offload()
298 wr32(IGC_QBVCYCLET, cycle); in igc_tsn_enable_offload()

12345678910>>...18