Searched refs:cpu_role (Results 1 – 3 of 3) sorted by relevance
226 return !!(mmu->cpu_role. base_or_ext . reg##_##name); \239 return mmu->cpu_role.base.level > 0; in is_cr0_pg()244 return !mmu->cpu_role.base.has_4_byte_gpte; in is_cr4_pae()2369 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL && in shadow_walk_init_using_root()3788 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) { in mmu_alloc_shadow_roots()3812 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) { in mmu_alloc_shadow_roots()3851 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) { in mmu_alloc_shadow_roots()3865 quadrant = (mmu->cpu_role.base.level == PT32_ROOT_LEVEL) ? i : 0; in mmu_alloc_shadow_roots()3901 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL || in mmu_alloc_special_roots()4006 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) { in kvm_mmu_sync_roots()[all …]
58 #define PT_HAVE_ACCESSED_DIRTY(mmu) (!(mmu)->cpu_role.base.ad_disabled)288 gpte &= level - (PT32_ROOT_LEVEL + mmu->cpu_role.ext.cr4_pse); in FNAME()326 walker->level = mmu->cpu_role.base.level; in FNAME()639 top_level = vcpu->arch.mmu->cpu_role.base.level; in FNAME()
449 union kvm_cpu_role cpu_role; member