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Searched refs:conf2 (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/regulator/
Dpv88090-regulator.c36 unsigned int conf2; member
184 .conf2 = PV88090_REG_##regl_name##_CONF2, \
275 unsigned int conf2, range, index; in pv88090_i2c_probe() local
338 pv88090_regulator_info[i].conf2, &conf2); in pv88090_i2c_probe()
342 conf2 = (conf2 >> PV88090_BUCK_VDAC_RANGE_SHIFT) & in pv88090_i2c_probe()
353 index = ((range << 1) | conf2); in pv88090_i2c_probe()
Dpv88080-regulator.c39 unsigned int conf2; member
386 unsigned int conf2, conf5; in pv88080_i2c_probe() local
479 pv88080_regulator_info[i].conf2 in pv88080_i2c_probe()
493 pv88080_regulator_info[i].conf2, &conf2); in pv88080_i2c_probe()
496 conf2 = ((conf2 >> PV88080_BUCK_VDAC_RANGE_SHIFT) & in pv88080_i2c_probe()
507 pv88080_buck_vol[conf2].min_uV * (conf5+1); in pv88080_i2c_probe()
509 pv88080_buck_vol[conf2].uV_step * (conf5+1); in pv88080_i2c_probe()
511 ((pv88080_buck_vol[conf2].max_uV * (conf5+1)) in pv88080_i2c_probe()
/linux-6.6.21/drivers/pinctrl/intel/
Dpinctrl-lynxpoint.c265 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2); in lp_pin_dbg_show() local
276 seq_printf(s, "0x%08x 0x%08x", value, ioread32(conf2)); in lp_pin_dbg_show()
336 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2); in lp_gpio_request_enable() local
355 lp_gpio_enable_input(conf2); in lp_gpio_request_enable()
367 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2); in lp_gpio_disable_free() local
373 lp_gpio_disable_input(conf2); in lp_gpio_disable_free()
426 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2); in lp_pin_config_get() local
433 value = ioread32(conf2); in lp_pin_config_get()
469 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2); in lp_pin_config_set() local
477 value = ioread32(conf2); in lp_pin_config_set()
[all …]
/linux-6.6.21/drivers/gpu/drm/mcde/
Dmcde_display.c346 u32 conf2; in mcde_configure_overlay() local
356 conf2 = MCDE_OVL0CONF2; in mcde_configure_overlay()
364 conf2 = MCDE_OVL1CONF2; in mcde_configure_overlay()
372 conf2 = MCDE_OVL2CONF2; in mcde_configure_overlay()
380 conf2 = MCDE_OVL3CONF2; in mcde_configure_overlay()
388 conf2 = MCDE_OVL4CONF2; in mcde_configure_overlay()
396 conf2 = MCDE_OVL5CONF2; in mcde_configure_overlay()
463 writel(val, mcde->regs + conf2); in mcde_configure_overlay()
/linux-6.6.21/arch/arm/boot/dts/gemini/
Dgemini-nas4220b.dts117 conf2 {
Dgemini-sq201.dts192 conf2 {
Dgemini-sl93512r.dts196 conf2 {
Dgemini-dlink-dns-313.dts246 conf2 {
/linux-6.6.21/drivers/atm/
Dlanai.c285 u32 conf1, conf2; /* CONFIG[12] registers */ member
499 reg_write(lanai, lanai->conf2, Config2_Reg); in conf2_write()
1977 lanai->conf2 |= CONFIG2_VCI0_NORMAL; in vci0_is_ok()
2009 lanai->conf2 &= ~CONFIG2_VCI0_NORMAL; in vci_is_ok()
2093 lanai->conf2 |= CONFIG2_CBR_ENABLE; in lanai_cbr_setup()
2099 lanai->conf2 &= ~CONFIG2_CBR_ENABLE; in lanai_cbr_shutdown()
2191 lanai->conf2 = (lanai->num_vci >= 512 ? CONFIG2_HOWMANY : 0) | in lanai_dev_open()
/linux-6.6.21/Documentation/arch/x86/x86_64/
Dboot-options.rst213 pci=conf2
214 Use conf2 access.
/linux-6.6.21/drivers/hwmon/
Dadm1031.c78 u8 conf2; member
167 data->conf2 = adm1031_read_value(client, ADM1031_REG_CONF2); in adm1031_update_device()
/linux-6.6.21/Documentation/admin-guide/
Dkernel-parameters.txt4270 conf2 [X86] Force use of PCI Configuration Access