Searched refs:cond_reg (Results 1 – 4 of 4) sorted by relevance
90 __volatile__ unsigned long cond_reg; /* DMA condition register */ member197 #define DMA_ERROR_P(regs) ((((regs)->cond_reg) & DMA_HNDL_ERROR))198 #define DMA_IRQ_P(regs) ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)))199 #define DMA_WRITE_P(regs) ((((regs)->cond_reg) & DMA_ST_WRITE))200 #define DMA_OFF(regs) ((((regs)->cond_reg) &= (~DMA_ENABLE)))201 #define DMA_INTSOFF(regs) ((((regs)->cond_reg) &= (~DMA_INT_ENAB)))202 #define DMA_INTSON(regs) ((((regs)->cond_reg) |= (DMA_INT_ENAB)))203 #define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV))206 ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB))))208 ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE)))))[all …]
101 unsigned char cond_reg; /* DMA cond (ro) [0x402] */ member102 #define ctrl_reg cond_reg /* DMA control (wo) [0x402] */114 unsigned char cond_reg; /* DMA cond (ro) [0x000] */ member115 #define ctrl_reg cond_reg /* DMA control (wo) [0x000] */129 unsigned char cond_reg; /* DMA status (ro) [0x0000] */ member130 #define ctrl_reg cond_reg /* DMA control (wo) [0x0000] */194 unsigned char dma_status = readb(&dregs->cond_reg); in cyber_esp_irq_pending()206 dma_status = readb(&dregs->cond_reg); in fastlane_esp_irq_pending()
356 struct dbg_idle_chk_cond_reg cond_reg; /* condition register */ member
3735 cond_regs = ®s[0].cond_reg; in qed_idle_chk_dump_failure()3875 cond_regs = ®s[0].cond_reg; in qed_idle_chk_dump_rule_entries()