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/linux-6.6.21/Documentation/devicetree/bindings/arm/marvell/
Dcoherency-fabric.txt9 * "marvell,coherency-fabric", to be used for the coherency fabric of
12 * "marvell,armada-375-coherency-fabric", for the Armada 375 coherency
15 * "marvell,armada-380-coherency-fabric", for the Armada 38x coherency
18 - reg: Should contain coherency fabric registers location and
21 * For "marvell,coherency-fabric", the first pair for the coherency
24 * For "marvell,armada-375-coherency-fabric", only one pair is needed
27 * For "marvell,armada-380-coherency-fabric", only one pair is needed
37 coherency-fabric@d0020200 {
38 compatible = "marvell,coherency-fabric";
44 coherency-fabric@21810 {
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/linux-6.6.21/Documentation/devicetree/bindings/powerpc/fsl/
Dccf.txt5 The CoreNet coherency fabric is a fabric-oriented, connectivity infrastructure
11 fsl,corenet1-cf - CoreNet coherency fabric version 1.
14 fsl,corenet2-cf - CoreNet coherency fabric version 2.
/linux-6.6.21/Documentation/filesystems/caching/
Dnetfs-api.rst18 (4) Cookies have coherency data that allows a cache to determine if the
35 (7) Data file coherency
72 for the cookie in the background, to check its coherency and, if necessary, to
104 and notes the coherency data.
116 The specified coherency data is stored in the cookie and will be matched
117 against coherency data stored on disk. The data pointer may be NULL if no data
118 is provided. If the coherency data doesn't match, the entire cache volume will
136 coherency data will be set to the value supplied. The amount of coherency data
163 The caller should also pass in a piece of coherency data in aux_data. A buffer
164 of size aux_data_len will be allocated and the coherency data copied in. It is
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Dbackend-api.rst147 u8 coherency[];
165 * ``coherency`` - A piece of coherency data that should be checked when the
168 * ``coherency_len`` - The amount of data in the coherency buffer.
203 * FSCACHE_COOKIE_NEEDS_UPDATE - The coherency data and/or object size has
227 * ``aux_len`` - The length of the coherency data buffer.
237 Each cookie also has a buffer for coherency data. This may also be inline or
/linux-6.6.21/Documentation/arch/arm/
Dcluster-pm-race-avoidance.rst6 cluster setup and teardown operations and to manage hardware coherency
33 mechanisms like Linux spinlocks may rely on coherency mechanisms which
73 enabling coherency.
83 coherency exit.
160 A CPU cannot start participating in hardware coherency until the
178 start participating in local coherency.
201 While in this state, the CPU exits coherency, including any
318 enabling of hardware coherency at the cluster level and any
323 setup to enable other CPUs in the cluster to enter coherency
329 cluster-level setup and hardware coherency complete
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/linux-6.6.21/Documentation/ABI/removed/
Dnet_dma7 coherency issues of the cpu potentially touching the buffers
/linux-6.6.21/arch/arm/mach-mvebu/
DMakefile7 obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o
/linux-6.6.21/Documentation/filesystems/
Docfs2.rst106 coherency=full (*) Disallow concurrent O_DIRECT writes, cluster inode
108 therefore full cluster coherency is guaranteed even
110 coherency=buffered Allow concurrent O_DIRECT writes without EX lock among
/linux-6.6.21/fs/fscache/
Dvolume.c220 volume = kzalloc(struct_size(volume, coherency, coherency_len), in fscache_alloc_volume()
228 memcpy(volume->coherency, coherency_data, coherency_len); in fscache_alloc_volume()
437 memcpy(volume->coherency, coherency_data, volume->coherency_len); in __fscache_relinquish_volume()
/linux-6.6.21/arch/arm/boot/dts/broadcom/
Dbcm-nsp-ax.dtsi5 * lack of DMA coherency.
/linux-6.6.21/fs/cachefiles/
Dxattr.c195 const void *p = volume->vcookie->coherency; in cachefiles_set_volume_xattr()
238 const void *p = volume->vcookie->coherency; in cachefiles_check_volume_xattr()
/linux-6.6.21/drivers/gpu/drm/i915/selftests/
Di915_live_selftests.h36 selftest(coherency, i915_gem_coherency_live_selftests)
/linux-6.6.21/Documentation/devicetree/bindings/arm/
Darm,cci-400.yaml13 ARM multi-cluster systems maintain intra-cluster coherency through a cache
15 and manage coherency, TLB invalidations and memory barriers.
/linux-6.6.21/Documentation/devicetree/bindings/watchdog/
Dmarvel.txt29 "nbclk" (L2/coherency fabric clock),
/linux-6.6.21/Documentation/devicetree/bindings/timer/
Dmarvell,armada-370-xp-timer.txt22 "nbclk" (L2/coherency fabric clock),
/linux-6.6.21/arch/arm/boot/dts/marvell/
Darmada-370-xp.dtsi176 coherencyfab: coherency-fabric@20200 {
177 compatible = "marvell,coherency-fabric";
Darmada-370-seagate-personal-cloud.dtsi34 coherency-fabric@20200 {
/linux-6.6.21/Documentation/devicetree/bindings/ufs/
Dsamsung,exynos-ufs.yaml60 the control register for UFS io coherency setting.
/linux-6.6.21/Documentation/devicetree/bindings/pci/
Dti,j721e-pci-ep.yaml59 description: Indicates that the PCIe IP block can ensure the coherency
Dlayerscape-pcie-gen4.txt20 - dma-coherent: Indicates that the hardware IP block can ensure the coherency
Dlayerscape-pci.txt46 - dma-coherent: Indicates that the hardware IP block can ensure the coherency
/linux-6.6.21/drivers/block/drbd/
DKconfig35 cache coherency.
/linux-6.6.21/arch/powerpc/boot/dts/
Damigaone.dts13 coherency-off;
/linux-6.6.21/Documentation/devicetree/bindings/cache/
Dsifive,ccache0.yaml16 acts as directory-based coherency manager.
/linux-6.6.21/Documentation/admin-guide/device-mapper/
Dera.rst16 coherency after rolling back a vendor snapshot.

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