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Searched refs:clkdiv (Results 1 – 25 of 44) sorted by relevance

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/linux-6.6.21/drivers/clk/qcom/
Dclk-spmi-pmic-div.c24 struct clkdiv { struct
33 static inline struct clkdiv *to_clkdiv(struct clk_hw *hw) in to_clkdiv() argument
35 return container_of(hw, struct clkdiv, hw); in to_clkdiv()
51 static bool is_spmi_pmic_clkdiv_enabled(struct clkdiv *clkdiv) in is_spmi_pmic_clkdiv_enabled() argument
55 regmap_read(clkdiv->regmap, clkdiv->base + REG_EN_CTL, &val); in is_spmi_pmic_clkdiv_enabled()
61 __spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable, in __spmi_pmic_clkdiv_set_enable_state() argument
65 unsigned int ns = clkdiv->cxo_period_ns; in __spmi_pmic_clkdiv_set_enable_state()
68 ret = regmap_update_bits(clkdiv->regmap, clkdiv->base + REG_EN_CTL, in __spmi_pmic_clkdiv_set_enable_state()
81 static int spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable) in spmi_pmic_clkdiv_set_enable_state() argument
85 regmap_read(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1, &div_factor); in spmi_pmic_clkdiv_set_enable_state()
[all …]
/linux-6.6.21/drivers/spi/
Dspi-cavium.h46 uint64_t clkdiv:13; member
78 uint64_t clkdiv:13;
85 uint64_t clkdiv:13; member
111 uint64_t clkdiv:13;
118 uint64_t clkdiv:13; member
142 uint64_t clkdiv:13;
150 uint64_t clkdiv:13; member
180 uint64_t clkdiv:13;
187 uint64_t clkdiv:13; member
217 uint64_t clkdiv:13;
Dspi-cavium.c36 unsigned int clkdiv; in octeon_spi_do_transfer() local
48 clkdiv = p->sys_freq / (2 * xfer->speed_hz); in octeon_spi_do_transfer()
52 mpi_cfg.s.clkdiv = clkdiv; in octeon_spi_do_transfer()
Dspi-pci1xxxx.c161 u8 clkdiv; in pci1xxxx_spi_transfer_one() local
165 clkdiv = pci1xxxx_get_clock_div(xfer->speed_hz); in pci1xxxx_spi_transfer_one()
199 regval |= (clkdiv << 5); in pci1xxxx_spi_transfer_one()
/linux-6.6.21/drivers/hwtracing/intel_th/
Dpti.c27 unsigned int clkdiv; member
113 return scnprintf(buf, PAGE_SIZE, "%d\n", 1u << pti->clkdiv); in clock_divider_show()
131 pti->clkdiv = val; in clock_divider_store()
159 ctl |= pti->clkdiv << __ffs(PTI_CLKDIV); in intel_th_pti_activate()
183 pti->clkdiv = (ctl & PTI_CLKDIV) >> __ffs(PTI_CLKDIV); in read_hw_config()
188 if (!pti->clkdiv) in read_hw_config()
189 pti->clkdiv = 1; in read_hw_config()
/linux-6.6.21/drivers/w1/masters/
Dmxc_w1.c95 unsigned int clkdiv; in mxc_w1_probe() local
116 clkdiv = DIV_ROUND_CLOSEST(clkrate, 1000000); in mxc_w1_probe()
117 clkrate /= clkdiv; in mxc_w1_probe()
132 writeb(clkdiv - 1, mdev->regs + MXC_W1_TIME_DIVIDER); in mxc_w1_probe()
/linux-6.6.21/Documentation/devicetree/bindings/clock/
Dqcom,spmi-clkdiv.yaml4 $id: http://devicetree.org/schemas/clock/qcom,spmi-clkdiv.yaml#
20 const: qcom,spmi-clkdiv
57 compatible = "qcom,spmi-clkdiv";
Drenesas,emev2-smu.yaml49 const: renesas,emev2-smu-clkdiv
129 compatible = "renesas,emev2-smu-clkdiv";
/linux-6.6.21/arch/arm/boot/dts/renesas/
Demev2.dtsi72 compatible = "renesas,emev2-smu-clkdiv";
84 compatible = "renesas,emev2-smu-clkdiv";
103 compatible = "renesas,emev2-smu-clkdiv";
109 compatible = "renesas,emev2-smu-clkdiv";
115 compatible = "renesas,emev2-smu-clkdiv";
121 compatible = "renesas,emev2-smu-clkdiv";
/linux-6.6.21/sound/soc/intel/skylake/
Dskl-nhlt.c211 u32 clkdiv, div_ratio; in skl_get_mclk() local
222 clkdiv = i2s_config->mclk.mdivr & in skl_get_mclk()
227 clkdiv = i2s_config_ext->mclk.mdivr[0] & in skl_get_mclk()
234 if (clkdiv != SKL_MCLK_DIV_RATIO_MASK) in skl_get_mclk()
236 div_ratio = clkdiv + 2; in skl_get_mclk()
/linux-6.6.21/sound/soc/adi/
Daxi-spdif.c80 unsigned int clkdiv, stat; in axi_spdif_hw_params() local
97 clkdiv = DIV_ROUND_CLOSEST(clk_get_rate(spdif->clk_ref), in axi_spdif_hw_params()
99 clkdiv <<= AXI_SPDIF_CTRL_CLKDIV_OFFSET; in axi_spdif_hw_params()
103 AXI_SPDIF_CTRL_CLKDIV_MASK, clkdiv); in axi_spdif_hw_params()
/linux-6.6.21/sound/soc/codecs/
Dadau1701.c300 static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv, in adau1701_reset() argument
309 if (clkdiv != ADAU1707_CLKDIV_UNSET && adau1701->gpio_pll_mode) { in adau1701_reset()
310 switch (clkdiv) { in adau1701_reset()
334 adau1701->pll_clkdiv = clkdiv; in adau1701_reset()
349 if (clkdiv != ADAU1707_CLKDIV_UNSET) { in adau1701_reset()
441 unsigned int clkdiv = adau1701->sysclk / params_rate(params); in adau1701_hw_params() local
450 if (clkdiv != adau1701->pll_clkdiv) { in adau1701_hw_params()
451 ret = adau1701_reset(component, clkdiv, params_rate(params)); in adau1701_hw_params()
/linux-6.6.21/drivers/iio/adc/
Dlpc18xx_adc.c133 unsigned int clkdiv; in lpc18xx_adc_probe() local
176 clkdiv = DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET); in lpc18xx_adc_probe()
178 adc->cr_reg = (clkdiv << LPC18XX_ADC_CR_CLKDIV_SHIFT) | in lpc18xx_adc_probe()
/linux-6.6.21/drivers/pwm/
Dpwm-mediatek.c125 u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH, in pwm_mediatek_config() local
146 clkdiv++; in pwm_mediatek_config()
151 if (clkdiv > PWM_CLK_DIV_MAX) { in pwm_mediatek_config()
167 pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv); in pwm_mediatek_config()
Dpwm-tiehrpwm.c153 unsigned int clkdiv, hspclkdiv; in set_prescale_div() local
155 for (clkdiv = 0; clkdiv <= CLKDIV_MAX; clkdiv++) { in set_prescale_div()
168 *prescale_div = (1 << clkdiv) * in set_prescale_div()
171 *tb_clk_div = (clkdiv << TBCTL_CLKDIV_SHIFT) | in set_prescale_div()
/linux-6.6.21/drivers/gpu/drm/exynos/
Dexynos7_drm_decon.c144 u32 clkdiv; in decon_calc_clkdiv() local
147 clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->vclk), ideal_clk); in decon_calc_clkdiv()
149 return (clkdiv < 0x100) ? clkdiv : 0xff; in decon_calc_clkdiv()
156 u32 val, clkdiv; in decon_commit() local
205 clkdiv = decon_calc_clkdiv(ctx, mode); in decon_commit()
206 if (clkdiv > 1) { in decon_commit()
207 val = VCLKCON1_CLKVAL_NUM_VCLK(clkdiv - 1); in decon_commit()
Dexynos_drm_fimd.c194 u32 clkdiv; member
420 u32 clkdiv; in fimd_atomic_check() local
446 clkdiv = DIV_ROUND_CLOSEST(lcd_rate, ideal_clk); in fimd_atomic_check()
447 if (clkdiv >= 0x200) { in fimd_atomic_check()
453 ctx->clkdiv = (clkdiv < 0x100) ? clkdiv : 0xff; in fimd_atomic_check()
588 if (ctx->clkdiv > 1) in fimd_commit()
589 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR; in fimd_commit()
/linux-6.6.21/drivers/gpu/drm/tilcdc/
Dtilcdc_crtc.c208 unsigned int clkdiv; in tilcdc_crtc_set_clk() local
211 clkdiv = 2; /* first try using a standard divider of 2 */ in tilcdc_crtc_set_clk()
216 ret = clk_set_rate(priv->clk, pclk_rate * clkdiv); in tilcdc_crtc_set_clk()
218 real_pclk_rate = clk_rate / clkdiv; in tilcdc_crtc_set_clk()
234 clkdiv = DIV_ROUND_CLOSEST(clk_rate, pclk_rate); in tilcdc_crtc_set_clk()
243 real_pclk_rate = clk_rate / clkdiv; in tilcdc_crtc_set_clk()
255 tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv); in tilcdc_crtc_set_clk()
258 tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) | in tilcdc_crtc_set_clk()
/linux-6.6.21/arch/powerpc/platforms/52xx/
Dmpc52xx_common.c174 int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv) in mpc52xx_set_psc_clkdiv() argument
185 mclken_div = 0x8000 | (clkdiv & 0x1FF); in mpc52xx_set_psc_clkdiv()
/linux-6.6.21/drivers/mmc/host/
Dsunplus-mmc.c233 unsigned int clkdiv; in spmmc_set_bus_clk() local
243 clkdiv = (clk_get_rate(host->clk) + clk) / clk - 1; in spmmc_set_bus_clk()
244 if (clkdiv > 0xfff) in spmmc_set_bus_clk()
245 clkdiv = 0xfff; in spmmc_set_bus_clk()
247 value |= FIELD_PREP(SPMMC_CLOCK_DIVISION, clkdiv); in spmmc_set_bus_clk()
254 int clkdiv = FIELD_GET(SPMMC_CLOCK_DIVISION, readl(host->base + SPMMC_SD_CONFIG0_REG)); in spmmc_set_bus_timing() local
255 int delay = clkdiv / 2 < 7 ? clkdiv / 2 : 7; in spmmc_set_bus_timing()
Dsh_mmcif.c486 unsigned int clkdiv; in sh_mmcif_clock_control() local
498 clkdiv = 0; in sh_mmcif_clock_control()
517 clkdiv = i; in sh_mmcif_clock_control()
523 (best_freq >> (clkdiv + 1)), clk, best_freq, clkdiv); in sh_mmcif_clock_control()
526 clkdiv = clkdiv << 16; in sh_mmcif_clock_control()
528 clkdiv = CLK_SUP_PCLK; in sh_mmcif_clock_control()
530 clkdiv = (fls(DIV_ROUND_UP(current_clk, clk) - 1) - 1) << 16; in sh_mmcif_clock_control()
533 sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & clkdiv); in sh_mmcif_clock_control()
Datmel-mci.c1442 int clkdiv; in atmci_set_ios() local
1465 clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2; in atmci_set_ios()
1466 if (clkdiv < 0) { in atmci_set_ios()
1470 clkdiv = 0; in atmci_set_ios()
1471 } else if (clkdiv > 511) { in atmci_set_ios()
1475 clkdiv = 511; in atmci_set_ios()
1477 host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1) in atmci_set_ios()
1478 | ATMCI_MR_CLKODD(clkdiv & 1); in atmci_set_ios()
1480 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1; in atmci_set_ios()
1481 if (clkdiv > 255) { in atmci_set_ios()
[all …]
/linux-6.6.21/drivers/media/dvb-frontends/
Dstv6111.c366 u32 clkdiv = 0; in init_state() local
386 if (clkdiv <= 3) in init_state()
387 state->reg[0x00] |= (clkdiv & 0x03); in init_state()
/linux-6.6.21/drivers/i2c/busses/
Di2c-ibm_iic.h33 u8 clkdiv; member
/linux-6.6.21/drivers/gpu/drm/bridge/
Dtc358775.c382 u16 dsiclk, clkdiv, byteclk, t1, t2, t3, vsdelay; in tc_bridge_enable() local
433 clkdiv = dsiclk / (tc->lvds_link == DUAL_LINK ? DIVIDE_BY_6 : DIVIDE_BY_3); in tc_bridge_enable()
436 t2 = ((100000 / clkdiv)) * (hactive + hback_porch + hsync_len + hfront_porch) / 1000; in tc_bridge_enable()
440 vsdelay = (clkdiv * (t1 + t3) / byteclk) - hback_porch - hsync_len - hactive; in tc_bridge_enable()

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