| /linux-6.6.21/drivers/gpu/drm/imx/ipuv3/ |
| D | imx-ldb.c | 101 struct clk *clk_sel[4]; /* parent of display clock */ member
187 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]); in imx_ldb_set_clock()
201 if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) { in imx_ldb_encoder_enable()
209 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]); in imx_ldb_encoder_enable()
210 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]); in imx_ldb_encoder_enable()
215 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]); in imx_ldb_encoder_enable()
264 if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) { in imx_ldb_encoder_atomic_mode_set()
354 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]); in imx_ldb_encoder_disable()
660 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname); in imx_ldb_probe()
661 if (IS_ERR(imx_ldb->clk_sel[i])) { in imx_ldb_probe()
[all …]
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| /linux-6.6.21/arch/mips/include/asm/octeon/ |
| D | cvmx-gpio-defs.h | 53 uint64_t clk_sel:2; member
67 uint64_t clk_sel:2;
97 uint64_t clk_sel:2; member
111 uint64_t clk_sel:2;
360 uint64_t clk_sel:2; member
374 uint64_t clk_sel:2;
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| /linux-6.6.21/drivers/net/ethernet/atheros/atl1c/ |
| D | atl1c_hw.c | 274 void atl1c_start_phy_polling(struct atl1c_hw *hw, u16 clk_sel) in atl1c_start_phy_polling() argument
282 FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) | in atl1c_start_phy_polling()
306 u16 clk_sel = MDIO_CTRL_CLK_25_4; in atl1c_read_phy_core() local
315 clk_sel = MDIO_CTRL_CLK_25_128; in atl1c_read_phy_core()
320 FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) | in atl1c_read_phy_core()
326 FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) | in atl1c_read_phy_core()
339 atl1c_start_phy_polling(hw, clk_sel); in atl1c_read_phy_core()
355 u16 clk_sel = MDIO_CTRL_CLK_25_4; in atl1c_write_phy_core() local
363 clk_sel = MDIO_CTRL_CLK_25_128; in atl1c_write_phy_core()
369 FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) | in atl1c_write_phy_core()
[all …]
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| D | atl1c_hw.h | 43 void atl1c_start_phy_polling(struct atl1c_hw *hw, u16 clk_sel);
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| /linux-6.6.21/drivers/leds/rgb/ |
| D | leds-qcom-lpg.c | 144 unsigned int clk_sel; member
272 unsigned int clk_sel, clk_len, best_clk = 0; in lpg_calc_freq() local
336 for (clk_sel = 1; clk_sel < clk_len; clk_sel++) { in lpg_calc_freq()
337 u64 numerator = period * clk_rate_arr[clk_sel]; in lpg_calc_freq()
354 clk_rate_arr[clk_sel]); in lpg_calc_freq()
360 best_clk = clk_sel; in lpg_calc_freq()
367 chan->clk_sel = best_clk; in lpg_calc_freq()
383 clk_rate = lpg_clk_rates_hi_res[chan->clk_sel]; in lpg_calc_duty()
386 clk_rate = lpg_clk_rates[chan->clk_sel]; in lpg_calc_duty()
403 val = chan->clk_sel; in lpg_apply_freq()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dccg.c | 83 uint32_t clk_sel = 0; in dccg2_get_dccg_ref_freq() local
85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
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| /linux-6.6.21/drivers/iio/adc/ |
| D | vf610_adc.c | 103 enum clk_sel { enum
141 enum clk_sel clk_sel; member
238 adc_feature->clk_sel = VF610_ADCIOC_BUSCLK_SET; in vf610_adc_cfg_init()
258 switch (adc_feature->clk_sel) { in vf610_adc_cfg_post_set()
379 switch (adc_feature->clk_sel) { in vf610_adc_sample_set()
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| D | stm32-adc-core.c | 76 int (*clk_sel)(struct platform_device *, struct stm32_adc_priv *); member
791 ret = priv->cfg->clk_sel(pdev, priv); in stm32_adc_probe()
864 .clk_sel = stm32f4_adc_clk_sel,
872 .clk_sel = stm32h7_adc_clk_sel,
881 .clk_sel = stm32h7_adc_clk_sel,
890 .clk_sel = stm32h7_adc_clk_sel,
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| /linux-6.6.21/drivers/net/ethernet/atheros/alx/ |
| D | hw.c | 64 u32 val, clk_sel; in alx_read_phy_core() local
70 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_read_phy_core()
81 clk_sel << ALX_MDIO_CLK_SEL_SHIFT; in alx_read_phy_core()
84 clk_sel << ALX_MDIO_CLK_SEL_SHIFT | in alx_read_phy_core()
101 u32 val, clk_sel; in alx_write_phy_core() local
104 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_write_phy_core()
114 clk_sel << ALX_MDIO_CLK_SEL_SHIFT | in alx_write_phy_core()
119 clk_sel << ALX_MDIO_CLK_SEL_SHIFT | in alx_write_phy_core()
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| /linux-6.6.21/drivers/tty/serial/ |
| D | samsung_tty.c | 1424 unsigned int clk_sel) in s3c24xx_serial_setsource() argument
1433 if ((ucon & info->clksel_mask) >> info->clksel_shift == clk_sel) in s3c24xx_serial_setsource()
1437 ucon |= clk_sel << info->clksel_shift; in s3c24xx_serial_setsource()
1454 if (ourport->cfg->clk_sel && in s3c24xx_serial_getclk()
1455 !(ourport->cfg->clk_sel & (1 << cnt))) in s3c24xx_serial_getclk()
1543 unsigned int baud, quot, clk_sel = 0; in s3c24xx_serial_set_termios() local
1559 quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel); in s3c24xx_serial_set_termios()
1570 s3c24xx_serial_setsource(port, clk_sel); in s3c24xx_serial_set_termios()
1871 unsigned int clk_sel; in s3c24xx_serial_enable_baudclk() local
1876 clk_sel = ourport->cfg->clk_sel ? : info->def_clk_sel; in s3c24xx_serial_enable_baudclk()
[all …]
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| /linux-6.6.21/sound/soc/sti/ |
| D | uniperif_player.c | 957 if (player->clk_sel) { in uni_player_resume()
958 ret = regmap_field_write(player->clk_sel, 1); in uni_player_resume()
1031 player->clk_sel = regmap_field_alloc(regmap, regfield[0]); in uni_player_parse_dt_audio_glue()
1082 if (player->clk_sel) { in uni_player_init()
1083 ret = regmap_field_write(player->clk_sel, 1); in uni_player_init()
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| D | uniperif.h | 1300 struct regmap_field *clk_sel; member
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| /linux-6.6.21/drivers/video/fbdev/ |
| D | grvga.c | 42 int clk_sel; member
112 par->clk_sel = i; in grvga_check_var()
180 __raw_writel((par->clk_sel << 6) | (func << 4) | 1, in grvga_set_par()
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| /linux-6.6.21/drivers/clk/imx/ |
| D | clk-imx93.c | 18 enum clk_sel { enum
54 enum clk_sel sel;
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| /linux-6.6.21/drivers/clk/ralink/ |
| D | clk-mt7621.c | 261 u32 clkcfg, clk_sel, curclk, ffiv, ffrac; in mt7621_cpu_recalc_rate() local
266 clk_sel = FIELD_GET(CPU_CLK_SEL_MASK, clkcfg); in mt7621_cpu_recalc_rate()
272 switch (clk_sel) { in mt7621_cpu_recalc_rate()
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| /linux-6.6.21/drivers/spi/ |
| D | spi-sunplus-sp7021.c | 287 u32 clk_rate, clk_sel, div; in sp7021_spi_setup_clk() local
292 clk_sel = (div / 2) - 1; in sp7021_spi_setup_clk()
294 pspim->xfer_conf |= FIELD_PREP(SP7021_CLK_MASK, clk_sel); in sp7021_spi_setup_clk()
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| D | spi-geni-qcom.c | 361 u32 clk_sel, m_clk_cfg, idx, div; in geni_spi_set_clock_and_bw() local
383 clk_sel = idx & CLK_SEL_MSK; in geni_spi_set_clock_and_bw()
385 writel(clk_sel, se->base + SE_GENI_CLK_SEL); in geni_spi_set_clock_and_bw()
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| /linux-6.6.21/include/linux/ |
| D | serial_s3c.h | 284 unsigned int clk_sel; member
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| /linux-6.6.21/drivers/clk/mvebu/ |
| D | armada-37xx-periph.c | 67 u32 clk_sel; member
702 data->clk_sel = readl(data->reg + CLK_SEL); in armada_3700_periph_clock_suspend()
718 writel(data->clk_sel, data->reg + CLK_SEL); in armada_3700_periph_clock_resume()
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| /linux-6.6.21/sound/soc/intel/atom/sst/ |
| D | sst.h | 117 u64 clk_sel:3; member
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| /linux-6.6.21/drivers/media/dvb-frontends/ |
| D | stv0900_core.c | 287 u32 m_div, clk_sel; in stv0900_set_mclk() local
298 clk_sel = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6); in stv0900_set_mclk()
299 m_div = ((clk_sel * mclk) / intp->quartz) - 1; in stv0900_set_mclk()
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| D | stv090x.c | 4272 u32 reg, div, clk_sel; in stv090x_set_mclk() local
4275 clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6); in stv090x_set_mclk()
4277 div = ((clk_sel * mclk) / config->xtal) - 1; in stv090x_set_mclk()
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| /linux-6.6.21/drivers/gpu/drm/i915/display/ |
| D | intel_ddi.c | 1478 u32 clk_sel_mask, u32 clk_sel, u32 clk_off) in _icl_ddi_enable_clock() argument
1482 intel_de_rmw(i915, reg, clk_sel_mask, clk_sel); in _icl_ddi_enable_clock()
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