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Searched refs:clk_mgr_internal (Results 1 – 25 of 57) sorted by relevance

123

/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr_smu_msg.h31 struct clk_mgr_internal;
33 bool dcn30_smu_test_message(struct clk_mgr_internal *clk_mgr, uint32_t input);
34 bool dcn30_smu_get_smu_version(struct clk_mgr_internal *clk_mgr, unsigned int *version);
35 bool dcn30_smu_check_driver_if_version(struct clk_mgr_internal *clk_mgr);
36 bool dcn30_smu_check_msg_header_version(struct clk_mgr_internal *clk_mgr);
37 void dcn30_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high);
38 void dcn30_smu_set_dram_addr_low(struct clk_mgr_internal *clk_mgr, uint32_t addr_low);
39 void dcn30_smu_transfer_wm_table_smu_2_dram(struct clk_mgr_internal *clk_mgr);
40 void dcn30_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);
41 unsigned int dcn30_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_…
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Ddcn30_clk_mgr_smu_msg.c55 static uint32_t dcn30_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us… in dcn30_smu_wait_for_response()
77 static bool dcn30_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint32_t msg_id, uint32… in dcn30_smu_send_msg_with_param()
110 bool dcn30_smu_test_message(struct clk_mgr_internal *clk_mgr, uint32_t input) in dcn30_smu_test_message()
124 bool dcn30_smu_get_smu_version(struct clk_mgr_internal *clk_mgr, unsigned int *version) in dcn30_smu_get_smu_version()
140 bool dcn30_smu_check_driver_if_version(struct clk_mgr_internal *clk_mgr) in dcn30_smu_check_driver_if_version()
159 bool dcn30_smu_check_msg_header_version(struct clk_mgr_internal *clk_mgr) in dcn30_smu_check_msg_header_version()
177 void dcn30_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high) in dcn30_smu_set_dram_addr_high()
185 void dcn30_smu_set_dram_addr_low(struct clk_mgr_internal *clk_mgr, uint32_t addr_low) in dcn30_smu_set_dram_addr_low()
193 void dcn30_smu_transfer_wm_table_smu_2_dram(struct clk_mgr_internal *clk_mgr) in dcn30_smu_transfer_wm_table_smu_2_dram()
201 void dcn30_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr) in dcn30_smu_transfer_wm_table_dram_2_smu()
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Ddcn30_clk_mgr.c80 static void dcn3_init_single_clock(struct clk_mgr_internal *clk_mgr, uint32_t clk, unsigned int *en… in dcn3_init_single_clock()
101 static void dcn3_build_wm_range_table(struct clk_mgr_internal *clk_mgr) in dcn3_build_wm_range_table()
110 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_init_clocks()
172 static int dcn30_get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in dcn30_get_vco_frequency_from_reg()
196 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_update_clocks()
326 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_notify_wm_ranges()
357 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_hard_min_memclk()
378 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_hard_max_memclk()
389 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_max_memclk()
398 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_min_memclk()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_smu.h114 int dcn315_smu_get_smu_version(struct clk_mgr_internal *clk_mgr);
115 int dcn315_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
116 int dcn315_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);
117 int dcn315_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf…
118 int dcn315_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz);
119 void dcn315_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info);
120 void dcn315_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable);
121 void dcn315_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high);
122 void dcn315_smu_set_dram_addr_low(struct clk_mgr_internal *clk_mgr, uint32_t addr_low);
123 void dcn315_smu_transfer_dpm_table_smu_2_dram(struct clk_mgr_internal *clk_mgr);
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Ddcn315_smu.c113 static uint32_t dcn315_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn315_smu_wait_for_response()
132 struct clk_mgr_internal *clk_mgr, in dcn315_smu_send_msg_with_param()
178 int dcn315_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn315_smu_get_smu_version()
187 int dcn315_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn315_smu_set_dispclk()
203 int dcn315_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn315_smu_set_hard_min_dcfclk()
225 int dcn315_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn315_smu_set_min_deep_sleep_dcfclk()
243 int dcn315_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn315_smu_set_dppclk()
258 void dcn315_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn315_smu_set_display_idle_optimization()
273 void dcn315_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn315_smu_enable_phy_refclk_pwrdwn()
291 void dcn315_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr) in dcn315_smu_enable_pme_wa()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_smu.h93 int dcn314_smu_get_smu_version(struct clk_mgr_internal *clk_mgr);
94 int dcn314_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
95 int dcn314_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);
96 int dcn314_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);
97 int dcn314_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf…
98 int dcn314_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz);
99 void dcn314_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info);
100 void dcn314_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable);
101 void dcn314_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr);
102 void dcn314_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high);
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Ddcn314_smu.c101 static uint32_t dcn314_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn314_smu_wait_for_response()
119 static int dcn314_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn314_smu_send_msg_with_param()
166 int dcn314_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn314_smu_get_smu_version()
175 int dcn314_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn314_smu_set_dispclk()
191 int dcn314_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn314_smu_set_dprefclk()
208 int dcn314_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn314_smu_set_hard_min_dcfclk()
232 int dcn314_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn314_smu_set_min_deep_sleep_dcfclk()
250 int dcn314_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn314_smu_set_dppclk()
265 void dcn314_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn314_smu_set_display_idle_optimization()
280 void dcn314_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn314_smu_enable_phy_refclk_pwrdwn()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr_vbios_smu.h31 int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr);
32 int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
33 int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);
34 int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);
35 int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_d…
36 void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz);
37 int rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz);
38 void rn_vbios_smu_set_dcn_low_power_state(struct clk_mgr_internal *clk_mgr, enum dcn_pwr_state);
39 void rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable);
40 void rn_vbios_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr);
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Drn_clk_mgr_vbios_smu.c78 static uint32_t rn_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, u… in rn_smu_wait_for_response()
97 static int rn_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in rn_vbios_smu_send_msg_with_param()
129 int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in rn_vbios_smu_get_smu_version()
138 int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rn_vbios_smu_set_dispclk()
162 int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in rn_vbios_smu_set_dprefclk()
176 int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in rn_vbios_smu_set_hard_min_dcfclk()
195 int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_d… in rn_vbios_smu_set_min_deep_sleep_dcfclk()
210 void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz) in rn_vbios_smu_set_phyclk()
218 int rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in rn_vbios_smu_set_dppclk()
232 void rn_vbios_smu_set_dcn_low_power_state(struct clk_mgr_internal *clk_mgr, enum dcn_pwr_state stat… in rn_vbios_smu_set_dcn_low_power_state()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_smu.h122 int dcn316_smu_get_smu_version(struct clk_mgr_internal *clk_mgr);
123 int dcn316_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
124 int dcn316_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);
125 int dcn316_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf…
126 int dcn316_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz);
127 void dcn316_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info);
128 void dcn316_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable);
129 void dcn316_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high);
130 void dcn316_smu_set_dram_addr_low(struct clk_mgr_internal *clk_mgr, uint32_t addr_low);
131 void dcn316_smu_transfer_dpm_table_smu_2_dram(struct clk_mgr_internal *clk_mgr);
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Ddcn316_smu.c100 static uint32_t dcn316_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn316_smu_wait_for_response()
119 struct clk_mgr_internal *clk_mgr, in dcn316_smu_send_msg_with_param()
152 int dcn316_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn316_smu_get_smu_version()
161 int dcn316_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn316_smu_set_dispclk()
177 int dcn316_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn316_smu_set_hard_min_dcfclk()
199 int dcn316_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn316_smu_set_min_deep_sleep_dcfclk()
217 int dcn316_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn316_smu_set_dppclk()
232 void dcn316_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn316_smu_set_display_idle_optimization()
247 void dcn316_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn316_smu_enable_phy_refclk_pwrdwn()
265 void dcn316_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high) in dcn316_smu_set_dram_addr_high()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Ddcn301_smu.h150 int dcn301_smu_get_smu_version(struct clk_mgr_internal *clk_mgr);
151 int dcn301_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
152 int dcn301_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);
153 int dcn301_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);
154 int dcn301_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf…
155 int dcn301_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz);
156 void dcn301_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info);
157 void dcn301_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable);
158 void dcn301_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr);
159 void dcn301_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high);
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Ddcn301_smu.c79 static uint32_t dcn301_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn301_smu_wait_for_response()
97 static int dcn301_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn301_smu_send_msg_with_param()
129 int dcn301_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn301_smu_get_smu_version()
141 int dcn301_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn301_smu_set_dispclk()
156 int dcn301_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn301_smu_set_dprefclk()
172 int dcn301_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn301_smu_set_hard_min_dcfclk()
190 int dcn301_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn301_smu_set_min_deep_sleep_dcfclk()
204 int dcn301_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn301_smu_set_dppclk()
218 void dcn301_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn301_smu_set_display_idle_optimization()
230 void dcn301_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn301_smu_enable_phy_refclk_pwrdwn()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_smu.c86 static uint32_t dcn31_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us… in dcn31_smu_wait_for_response()
104 static int dcn31_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn31_smu_send_msg_with_param()
148 int dcn31_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn31_smu_get_smu_version()
157 int dcn31_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn31_smu_set_dispclk()
173 int dcn31_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn31_smu_set_dprefclk()
190 int dcn31_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn31_smu_set_hard_min_dcfclk()
212 int dcn31_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfc… in dcn31_smu_set_min_deep_sleep_dcfclk()
230 int dcn31_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn31_smu_set_dppclk()
245 void dcn31_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn31_smu_set_display_idle_optimization()
260 void dcn31_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn31_smu_enable_phy_refclk_pwrdwn()
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Ddcn31_smu.h254 int dcn31_smu_get_smu_version(struct clk_mgr_internal *clk_mgr);
255 int dcn31_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
256 int dcn31_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);
257 int dcn31_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);
258 int dcn31_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfc…
259 int dcn31_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz);
260 void dcn31_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info);
261 void dcn31_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable);
262 void dcn31_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr);
263 void dcn31_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high);
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
Ddcn32_clk_mgr_smu_msg.h40 dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr, bool enable);
41 void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);
42 void dcn32_smu_set_pme_workaround(struct clk_mgr_internal *clk_mgr);
43 void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways);
44 void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);
45 unsigned int dcn32_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_…
46 void dcn32_smu_wait_for_dmub_ack_mclk(struct clk_mgr_internal *clk_mgr, bool enable);
Ddcn32_clk_mgr_smu_msg.c50 static uint32_t dcn32_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us… in dcn32_smu_wait_for_response()
68 static bool dcn32_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint32_t msg_id, uint32… in dcn32_smu_send_msg_with_param()
93 void dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr, bool enable) in dcn32_smu_send_fclk_pstate_message()
101 void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways) in dcn32_smu_send_cab_for_uclk_message()
109 void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr) in dcn32_smu_transfer_wm_table_dram_2_smu()
117 void dcn32_smu_set_pme_workaround(struct clk_mgr_internal *clk_mgr) in dcn32_smu_set_pme_workaround()
126 unsigned int dcn32_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_… in dcn32_smu_set_hard_min_by_freq()
143 void dcn32_smu_wait_for_dmub_ack_mclk(struct clk_mgr_internal *clk_mgr, bool enable) in dcn32_smu_wait_for_dmub_ack_mclk()
Ddcn32_clk_mgr.h31 struct clk_mgr_internal *clk_mgr,
35 void dcn32_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr,
38 void dcn32_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr);
Ddcn32_clk_mgr.c125 static void dcn32_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, unsigned int *en… in dcn32_init_single_clock()
148 static void dcn32_build_wm_range_table(struct clk_mgr_internal *clk_mgr) in dcn32_build_wm_range_table()
157 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_init_clocks()
245 static void dcn32_update_clocks_update_dtb_dto(struct clk_mgr_internal *clk_mgr, in dcn32_update_clocks_update_dtb_dto()
276 static void dcn32_update_dppclk_dispclk_freq(struct clk_mgr_internal *clk_mgr, struct dc_clocks *ne… in dcn32_update_dppclk_dispclk_freq()
293 void dcn32_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, in dcn32_update_clocks_update_dpp_dto()
328 struct clk_mgr_internal *clk_mgr, in dcn32_update_clocks_update_dentist()
439 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_get_dispclk_from_dentist()
458 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_update_clocks()
651 static uint32_t dcn32_get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in dcn32_get_vco_frequency_from_reg()
[all …]
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
Ddce112_clk_mgr.h32 struct clk_mgr_internal *clk_mgr);
36 int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz);
37 int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr);
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/
Dclk_mgr.c158 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create()
171 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create()
181 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create()
191 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create()
215 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create()
229 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create()
257 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create()
332 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create()
368 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dc_destroy_clk_mgr()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
Ddce_clk_mgr.h33 int dce_adjust_dp_ref_freq_for_ss(struct clk_mgr_internal *clk_mgr_dce, int dp_ref_clk_khz);
44 struct clk_mgr_internal *clk_mgr_dce);
46 void dce_clock_read_ss_info(struct clk_mgr_internal *dccg_dce);
Ddce_clk_mgr.c114 int dce_adjust_dp_ref_freq_for_ss(struct clk_mgr_internal *clk_mgr_dce, int dp_ref_clk_khz) in dce_adjust_dp_ref_freq_for_ss()
131 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_get_dp_ref_freq_khz()
157 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce12_get_dp_ref_freq_khz()
198 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_get_required_clocks_state()
233 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_set_clock()
272 static void dce_clock_read_integrated_info(struct clk_mgr_internal *clk_mgr_dce) in dce_clock_read_integrated_info()
325 void dce_clock_read_ss_info(struct clk_mgr_internal *clk_mgr_dce) in dce_clock_read_ss_info()
401 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_update_clocks()
438 struct clk_mgr_internal *clk_mgr) in dce_clk_mgr_construct()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr_vbios_smu.c86 static uint32_t rv1_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, … in rv1_smu_wait_for_response()
104 static int rv1_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in rv1_vbios_smu_send_msg_with_param()
126 int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rv1_vbios_smu_set_dispclk()
147 int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in rv1_vbios_smu_set_dprefclk()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.h36 void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr,
42 struct clk_mgr_internal *clk_mgr,
53 void dcn20_update_clocks_update_dentist(struct clk_mgr_internal *clk_mgr,

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