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Searched refs:cfgs (Results 1 – 22 of 22) sorted by relevance

/linux-6.6.21/include/linux/pinctrl/
Dmachine.h108 #define PIN_MAP_CONFIGS_PIN(dev, state, pinctrl, pin, cfgs) \ argument
116 .configs = cfgs, \
117 .num_configs = ARRAY_SIZE(cfgs), \
121 #define PIN_MAP_CONFIGS_PIN_DEFAULT(dev, pinctrl, pin, cfgs) \ argument
122 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_DEFAULT, pinctrl, pin, cfgs)
124 #define PIN_MAP_CONFIGS_PIN_HOG(dev, state, pin, cfgs) \ argument
125 PIN_MAP_CONFIGS_PIN(dev, state, dev, pin, cfgs)
127 #define PIN_MAP_CONFIGS_PIN_HOG_DEFAULT(dev, pin, cfgs) \ argument
128 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_DEFAULT, dev, pin, cfgs)
130 #define PIN_MAP_CONFIGS_GROUP(dev, state, pinctrl, grp, cfgs) \ argument
[all …]
/linux-6.6.21/scripts/
Dgenerate_rust_analyzer.py13 def args_crates_cfgs(cfgs): argument
15 for cfg in cfgs:
21 def generate_crates(srctree, objtree, sysroot_src, external_src, cfgs): argument
35 crates_cfgs = args_crates_cfgs(cfgs)
158 … "crates": generate_crates(args.srctree, args.objtree, args.sysroot_src, args.exttree, args.cfgs),
/linux-6.6.21/drivers/phy/samsung/
Dphy-samsung-ufs.c79 const struct samsung_ufs_phy_cfg * const *cfgs = ufs_phy->cfgs; in samsung_ufs_phy_calibrate() local
90 cfg = cfgs[ufs_phy->ufs_phy_state]; in samsung_ufs_phy_calibrate()
276 phy->cfgs = drvdata->cfgs; in samsung_ufs_phy_probe()
Dphy-samsung-ufs.h110 const struct samsung_ufs_phy_cfg **cfgs; member
123 const struct samsung_ufs_phy_cfg * const *cfgs; member
Dphy-fsd-ufs.c54 .cfgs = fsd_ufs_phy_cfgs,
Dphy-exynosautov9-ufs.c65 .cfgs = exynosautov9_ufs_phy_cfgs,
Dphy-exynos7-ufs.c76 .cfgs = exynos7_ufs_phy_cfgs,
/linux-6.6.21/arch/mips/mm/
Dinit.c324 struct maar_config cfgs[3]; in maar_init() member
341 used = maar_config(recorded.cfgs, recorded.used, num_maars / 2); in maar_init()
393 if (used <= ARRAY_SIZE(recorded.cfgs)) { in maar_init()
394 recorded.cfgs[recorded.used].lower = lower; in maar_init()
395 recorded.cfgs[recorded.used].upper = upper; in maar_init()
396 recorded.cfgs[recorded.used].attrs = attr; in maar_init()
/linux-6.6.21/rust/
DMakefile60 core-cfgs = \
63 alloc-cfgs = \
111 rustdoc-core: private rustc_target_flags = $(core-cfgs)
122 rustdoc-alloc: private rustc_target_flags = $(alloc-cfgs) \
409 --cfgs='core=$(core-cfgs)' --cfgs='alloc=$(alloc-cfgs)' \
430 $(obj)/core.o: private rustc_target_flags = $(core-cfgs)
440 $(obj)/alloc.o: private rustc_target_flags = $(alloc-cfgs)
/linux-6.6.21/drivers/pinctrl/renesas/
Dpinctrl.c84 unsigned long *cfgs; in sh_pfc_map_add_config() local
86 cfgs = kmemdup(configs, num_configs * sizeof(*cfgs), in sh_pfc_map_add_config()
88 if (cfgs == NULL) in sh_pfc_map_add_config()
93 map->data.configs.configs = cfgs; in sh_pfc_map_add_config()
Dpinctrl-rzv2m.c197 unsigned long *cfgs; in rzv2m_map_add_config() local
199 cfgs = kmemdup(configs, num_configs * sizeof(*cfgs), in rzv2m_map_add_config()
201 if (!cfgs) in rzv2m_map_add_config()
206 map->data.configs.configs = cfgs; in rzv2m_map_add_config()
Dpinctrl-rzg2l.c237 unsigned long *cfgs; in rzg2l_map_add_config() local
239 cfgs = kmemdup(configs, num_configs * sizeof(*cfgs), in rzg2l_map_add_config()
241 if (!cfgs) in rzg2l_map_add_config()
246 map->data.configs.configs = cfgs; in rzg2l_map_add_config()
Dsh_pfc.h678 #define SH_PFC_PIN_CFG(_pin, cfgs) { \ argument
682 .configs = cfgs, \
/linux-6.6.21/Documentation/devicetree/bindings/thermal/
Dnvidia,tegra124-soctherm.yaml62 throttle-cfgs:
257 throttle-cfgs {
302 # referring to Tegra132's "reg", "reg-names" and "throttle-cfgs"
319 throttle-cfgs {
/linux-6.6.21/drivers/pinctrl/nxp/
Dpinctrl-s32cc.c222 unsigned long *cfgs = NULL; in s32_dt_group_node_to_map() local
233 ret = pinconf_generic_parse_dt_config(np, pctldev, &cfgs, &n_cfgs); in s32_dt_group_node_to_map()
254 num_maps, np->name, cfgs, n_cfgs, in s32_dt_group_node_to_map()
261 kfree(cfgs); in s32_dt_group_node_to_map()
/linux-6.6.21/drivers/mtd/devices/
Dst_spi_fsm.c1018 struct seq_rw_config cfgs[]) in stfsm_search_seq_rw_configs() argument
1023 for (config = cfgs; config->cmd != 0; config++) in stfsm_search_seq_rw_configs()
1101 struct seq_rw_config *cfgs) in stfsm_search_prepare_rw_seq() argument
1105 config = stfsm_search_seq_rw_configs(fsm, cfgs); in stfsm_search_prepare_rw_seq()
/linux-6.6.21/drivers/net/ethernet/emulex/benet/
Dbe_cmds.c4083 struct be_fat_conf_params *cfgs; in be_cmd_set_fw_log_level() local
4099 cfgs = (struct be_fat_conf_params *) in be_cmd_set_fw_log_level()
4101 for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { in be_cmd_set_fw_log_level()
4102 u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); in be_cmd_set_fw_log_level()
4105 if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) in be_cmd_set_fw_log_level()
4106 cfgs->module[i].trace_lvl[j].dbg_lvl = in be_cmd_set_fw_log_level()
4111 status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); in be_cmd_set_fw_log_level()
4121 struct be_fat_conf_params *cfgs; in be_cmd_get_fw_log_level() local
4139 cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + in be_cmd_get_fw_log_level()
4142 for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { in be_cmd_get_fw_log_level()
[all …]
Dbe_cmds.h2486 struct be_fat_conf_params *cfgs);
/linux-6.6.21/arch/arm64/boot/dts/nvidia/
Dtegra132.dtsi878 throttle-cfgs {
Dtegra210.dtsi1331 throttle-cfgs {
/linux-6.6.21/arch/arm/boot/dts/nvidia/
Dtegra124.dtsi930 throttle-cfgs {
/linux-6.6.21/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_nix.c3387 u64 cfgs[] = { in nix_af_mark_format_setup() local
3408 rc = rvu_nix_reserve_mark_format(rvu, nix_hw, blkaddr, cfgs[i]); in nix_af_mark_format_setup()