Home
last modified time | relevance | path

Searched refs:cfgPSWUSCFG0_0_PCIE_LANE_4_EQUALIZATION_CNTL (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_2_3_offset.h805 #define cfgPSWUSCFG0_0_PCIE_LANE_4_EQUALIZATION_CNTL … macro
Dnbio_4_3_0_offset.h2651 #define cfgPSWUSCFG0_0_PCIE_LANE_4_EQUALIZATION_CNTL … macro