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/linux-6.6.21/tools/perf/Documentation/
Dperf-c2c.txt20 you to track down the cacheline contentions.
88 Specify sorting fields for single cacheline display.
134 Group the detection of shared cacheline events into double cacheline
136 feature, which causes cacheline sharing to behave like the cacheline
141 The perf c2c record command setup options related to HITM cacheline analysis
177 - sort all the data based on the cacheline address
178 - store access details for each cacheline
184 2) offsets details for each cacheline
186 For each cacheline in the 1) list we display following data:
190 - zero based index to identify the cacheline
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Dtips.txt37 To report cacheline events from previous recording: perf c2c report
/linux-6.6.21/drivers/gpu/drm/i915/gt/
Dintel_ring.h111 #define cacheline(a) round_down(a, CACHELINE_BYTES) in assert_ring_tail_valid() macro
112 GEM_BUG_ON(cacheline(tail) == cacheline(head) && tail < head); in assert_ring_tail_valid()
113 #undef cacheline in assert_ring_tail_valid()
Dselftest_timeline.c97 unsigned long cacheline; in __mock_hwsp_timeline() local
110 cacheline = hwsp_cacheline(tl); in __mock_hwsp_timeline()
111 err = radix_tree_insert(&state->cachelines, cacheline, tl); in __mock_hwsp_timeline()
115 cacheline); in __mock_hwsp_timeline()
/linux-6.6.21/include/asm-generic/
Dvmlinux.lds.h1027 #define PERCPU_INPUT(cacheline) \ argument
1032 . = ALIGN(cacheline); \
1034 . = ALIGN(cacheline); \
1064 #define PERCPU_VADDR(cacheline, vaddr, phdr) \ argument
1067 PERCPU_INPUT(cacheline) \
1083 #define PERCPU_SECTION(cacheline) \ argument
1087 PERCPU_INPUT(cacheline) \
1109 #define RW_DATA(cacheline, pagealigned, inittask) \ argument
1115 CACHELINE_ALIGNED_DATA(cacheline) \
1116 READ_MOSTLY_DATA(cacheline) \
/linux-6.6.21/drivers/soc/qcom/
Dsmem.c155 __le32 cacheline; member
209 size_t cacheline; member
301 size_t cacheline) in phdr_to_first_cached_entry() argument
306 return p + le32_to_cpu(phdr->size) - ALIGN(sizeof(*e), cacheline); in phdr_to_first_cached_entry()
335 cached_entry_next(struct smem_private_entry *e, size_t cacheline) in cached_entry_next() argument
339 return p - le32_to_cpu(e->size) - ALIGN(sizeof(*e), cacheline); in cached_entry_next()
603 e = phdr_to_first_cached_entry(phdr, part->cacheline); in qcom_smem_get_private()
631 e = cached_entry_next(e, part->cacheline); in qcom_smem_get_private()
952 smem->global_partition.cacheline = le32_to_cpu(entry->cacheline); in qcom_smem_set_global_partition()
1005 smem->partitions[remote_host].cacheline = le32_to_cpu(entry->cacheline); in qcom_smem_enumerate_partitions()
/linux-6.6.21/drivers/md/bcache/
Dbset.c526 unsigned int cacheline, in cacheline_to_bkey() argument
529 return ((void *) t->data) + cacheline * BSET_CACHELINE + offset * 8; in cacheline_to_bkey()
538 unsigned int cacheline, in bkey_to_cacheline_offset() argument
541 return (u64 *) k - (u64 *) cacheline_to_bkey(t, cacheline, 0); in bkey_to_cacheline_offset()
558 static struct bkey *table_to_bkey(struct bset_tree *t, unsigned int cacheline) in table_to_bkey() argument
560 return cacheline_to_bkey(t, cacheline, t->prev[cacheline]); in table_to_bkey()
694 unsigned int j, cacheline = 1; in bch_bset_build_written_tree() local
715 while (bkey_to_cacheline(t, k) < cacheline) { in bch_bset_build_written_tree()
721 t->tree[j].m = bkey_to_cacheline_offset(t, cacheline++, k); in bch_bset_build_written_tree()
/linux-6.6.21/Documentation/translations/zh_CN/locking/
Dmutex-design.rst60cacheline bouncing)这种昂贵的开销。一个类MCS锁是为实现睡眠锁的
/linux-6.6.21/kernel/
DKconfig.hz14 contention and cacheline bounces as a result of timer interrupts.
/linux-6.6.21/Documentation/arch/sparc/
Dadi.rst35 size is same as cacheline size which is 64 bytes. A task that sets ADI
103 the corresponding cacheline, a memory corruption trap occurs. By
123 the corresponding cacheline, a memory corruption trap occurs. If
/linux-6.6.21/arch/sparc/kernel/
Dprom_irqtrans.c356 static unsigned char cacheline[64] in tomatillo_wsync_handler() local
367 "i" (FPRS_FEF), "r" (&cacheline[0]), in tomatillo_wsync_handler()
Dcherrs.S203 sub %g1, %g2, %g1 ! Move down 1 cacheline
215 subcc %g1, %g2, %g1 ! Next cacheline
/linux-6.6.21/Documentation/translations/zh_CN/core-api/
Dcachetlb.rst196 加载到不同的cacheline中就会出现别名现象。
/linux-6.6.21/arch/parisc/kernel/
Dperf_asm.S132 ; Cacheline start (32-byte cacheline)
145 ; Cacheline start (32-byte cacheline)
/linux-6.6.21/Documentation/locking/
Dmutex-design.rst55 cacheline bouncing that common test-and-set spinlock implementations
/linux-6.6.21/Documentation/kernel-hacking/
Dfalse-sharing.rst66 cache hot and save cacheline/TLB, like a lock and the data protected
/linux-6.6.21/Documentation/
Datomic_t.txt358 loop body. As a result there is no guarantee what so ever the cacheline
/linux-6.6.21/Documentation/driver-api/
Dedac.rst46 lockstep is enabled, the cacheline is doubled, but it generally brings
/linux-6.6.21/tools/perf/util/
DBuild10 perf-y += cacheline.o
/linux-6.6.21/Documentation/mm/
Dmultigen_lru.rst191 promotes hot pages. If the scan was done cacheline efficiently, it
/linux-6.6.21/Documentation/networking/device_drivers/ethernet/amazon/
Dena.rst28 and CPU cacheline optimized data placement.
/linux-6.6.21/security/
DKconfig.hardening362 best effort at restricting randomization to cacheline-sized
/linux-6.6.21/drivers/char/
DKconfig118 of threads across a large system which avoids bouncing a cacheline
/linux-6.6.21/Documentation/core-api/
Ddma-api-howto.rst137 buffers were cacheline-aligned. Without that, you'd see cacheline
/linux-6.6.21/drivers/edac/
DKconfig96 - inject_section (0..3, 16-byte section of 64-byte cacheline),

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