| /linux-6.6.21/arch/alpha/kernel/ ! |
| D | irq_pyxis.c | 22 static unsigned long cached_irq_mask; variable
35 pyxis_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); in pyxis_enable_irq()
41 pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); in pyxis_disable_irq()
48 unsigned long mask = cached_irq_mask &= ~bit; in pyxis_mask_and_ack_irq()
75 pld &= cached_irq_mask; in pyxis_device_interrupt()
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| D | sys_dp264.c | 40 static unsigned long cached_irq_mask; variable
103 cached_irq_mask |= 1UL << d->irq; in dp264_enable_irq()
104 tsunami_update_irq_hw(cached_irq_mask); in dp264_enable_irq()
112 cached_irq_mask &= ~(1UL << d->irq); in dp264_disable_irq()
113 tsunami_update_irq_hw(cached_irq_mask); in dp264_disable_irq()
121 cached_irq_mask |= 1UL << (d->irq - 16); in clipper_enable_irq()
122 tsunami_update_irq_hw(cached_irq_mask); in clipper_enable_irq()
130 cached_irq_mask &= ~(1UL << (d->irq - 16)); in clipper_disable_irq()
131 tsunami_update_irq_hw(cached_irq_mask); in clipper_disable_irq()
156 tsunami_update_irq_hw(cached_irq_mask); in dp264_set_affinity()
[all …]
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| D | sys_wildfire.c | 32 static unsigned long cached_irq_mask[WILDFIRE_NR_IRQS/(sizeof(long)*8)]; variable
59 *enable0 = cached_irq_mask[qbbno * WILDFIRE_PCA_PER_QBB + pcano]; in wildfire_update_irq_hw()
114 set_bit(irq, &cached_irq_mask); in wildfire_enable_irq()
128 clear_bit(irq, &cached_irq_mask); in wildfire_disable_irq()
142 clear_bit(irq, &cached_irq_mask); in wildfire_mask_and_ack_irq()
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| D | sys_rx164.c | 35 static unsigned long cached_irq_mask; variable
51 rx164_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); in rx164_enable_irq()
57 rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); in rx164_disable_irq()
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| D | irq_i8259.c | 24 static unsigned int cached_irq_mask = 0xffff; variable
40 i8259_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq)); in i8259a_enable_irq()
47 i8259_update_irq_hw(irq, cached_irq_mask |= 1 << irq); in __i8259a_disable_irq()
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| D | sys_eb64p.c | 37 static unsigned int cached_irq_mask = -1; variable
48 eb64p_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq)); in eb64p_enable_irq()
54 eb64p_update_irq_hw(d->irq, cached_irq_mask |= 1 << d->irq); in eb64p_disable_irq()
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| D | sys_mikasa.c | 37 static int cached_irq_mask; variable
48 mikasa_update_irq_hw(cached_irq_mask |= 1 << (d->irq - 16)); in mikasa_enable_irq()
54 mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (d->irq - 16))); in mikasa_disable_irq()
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| D | sys_eiger.c | 39 static unsigned long cached_irq_mask[2] = { -1, -1 }; variable
56 mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); in eiger_enable_irq()
65 mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); in eiger_disable_irq()
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| D | sys_takara.c | 34 static unsigned long cached_irq_mask[2] = { -1, -1 }; variable
51 mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); in takara_enable_irq()
60 mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); in takara_disable_irq()
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| D | sys_alcor.c | 36 static unsigned long cached_irq_mask; variable
48 alcor_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); in alcor_enable_irq()
54 alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); in alcor_disable_irq()
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| D | sys_noritake.c | 37 static int cached_irq_mask; variable
53 noritake_update_irq_hw(d->irq, cached_irq_mask |= 1 << (d->irq - 16)); in noritake_enable_irq()
59 noritake_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << (d->irq - 16))); in noritake_disable_irq()
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| D | sys_cabriolet.c | 38 static unsigned long cached_irq_mask = ~0UL; variable
50 cabriolet_update_irq_hw(d->irq, cached_irq_mask &= ~(1UL << d->irq)); in cabriolet_enable_irq()
56 cabriolet_update_irq_hw(d->irq, cached_irq_mask |= 1UL << d->irq); in cabriolet_disable_irq()
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| /linux-6.6.21/drivers/irqchip/ ! |
| D | irq-xtensa-pic.c | 22 unsigned int cached_irq_mask; variable
47 cached_irq_mask &= ~(1 << d->hwirq); in xtensa_irq_mask()
48 xtensa_set_sr(cached_irq_mask, intenable); in xtensa_irq_mask()
53 cached_irq_mask |= 1 << d->hwirq; in xtensa_irq_unmask()
54 xtensa_set_sr(cached_irq_mask, intenable); in xtensa_irq_unmask()
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| D | irq-xtensa-mx.c | 24 static DEFINE_PER_CPU(unsigned int, cached_irq_mask);
63 __this_cpu_write(cached_irq_mask, in secondary_init_irq()
83 mask = __this_cpu_read(cached_irq_mask) & ~mask; in xtensa_mx_irq_mask()
84 __this_cpu_write(cached_irq_mask, mask); in xtensa_mx_irq_mask()
101 mask |= __this_cpu_read(cached_irq_mask); in xtensa_mx_irq_unmask()
102 __this_cpu_write(cached_irq_mask, mask); in xtensa_mx_irq_unmask()
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| D | irq-i8259.c | 63 static unsigned int cached_irq_mask = 0xffff; variable
65 #define cached_master_mask (cached_irq_mask)
66 #define cached_slave_mask (cached_irq_mask >> 8)
75 cached_irq_mask |= mask; in disable_8259A_irq()
90 cached_irq_mask &= mask; in enable_8259A_irq()
156 if (cached_irq_mask & irqmask) in mask_and_ack_8259A()
158 cached_irq_mask |= irqmask; in mask_and_ack_8259A()
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| /linux-6.6.21/arch/x86/include/asm/ ! |
| D | i8259.h | 8 extern unsigned int cached_irq_mask;
11 #define cached_master_mask (__byte(0, cached_irq_mask))
12 #define cached_slave_mask (__byte(1, cached_irq_mask))
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| /linux-6.6.21/arch/x86/kernel/ ! |
| D | i8259.c | 46 unsigned int cached_irq_mask = 0xffff; variable
65 cached_irq_mask |= mask; in mask_8259A_irq()
84 cached_irq_mask &= mask; in unmask_8259A_irq()
174 if (cached_irq_mask & irqmask) in mask_and_ack_8259A()
176 cached_irq_mask |= irqmask; in mask_and_ack_8259A()
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