Searched refs:c20 (Results 1 – 10 of 10) sorted by relevance
| /linux-6.6.21/drivers/iio/pressure/ |
| D | dps310.c | 89 s32 c00, c10, c20, c30, c01, c11, c21; member
116 u32 c00, c10, c20, c30, c01, c11, c21; in dps310_get_coefs() local
151 c20 = (coef[12] << 8) | coef[13]; in dps310_get_coefs()
152 data->c20 = sign_extend32(c20, 15); in dps310_get_coefs()
658 nums[2] = p * p * (s64)data->c20; in dps310_calculate_pressure()
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| /linux-6.6.21/drivers/ata/pata_parport/ |
| D | Kconfig | 128 tristate "OnSpec 90c20 protocol"
131 This option enables support for the (obsolete) 90c20 parallel port
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| /linux-6.6.21/arch/arm/boot/dts/amlogic/ |
| D | meson.dtsi | 137 sdio: mmc@8c20 {
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| /linux-6.6.21/Documentation/admin-guide/blockdev/ |
| D | paride.rst | 78 on20 OnSpec 90c20 (US)
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| /linux-6.6.21/drivers/gpu/drm/i915/display/ |
| D | intel_cx0_phy.c | 2023 &crtc_state->cx0pll_state.c20) == 0) in intel_c20pll_calc_state()
2033 crtc_state->cx0pll_state.c20 = *tables[i]; in intel_c20pll_calc_state()
2240 const struct intel_c20pll_state *pll_state = &crtc_state->cx0pll_state.c20; in intel_c20_pll_program()
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| D | intel_display_types.h | 1025 struct intel_c20pll_state c20; member
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| D | intel_ddi.c | 3863 intel_c20pll_readout_hw_state(encoder, &crtc_state->cx0pll_state.c20); in mtl_ddi_get_config()
3864 intel_c20pll_dump_hw_state(i915, &crtc_state->cx0pll_state.c20); in mtl_ddi_get_config()
3865 crtc_state->port_clock = intel_c20pll_calc_port_clock(encoder, &crtc_state->cx0pll_state.c20); in mtl_ddi_get_config()
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| D | intel_dpll.c | 1018 crtc_state->port_clock = intel_c20pll_calc_port_clock(encoder, &crtc_state->cx0pll_state.c20); in mtl_crtc_compute_clock()
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| /linux-6.6.21/arch/arm/boot/dts/samsung/ |
| D | exynos4.dtsi | 129 pd_tv: power-domain@10023c20 {
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| /linux-6.6.21/arch/s390/tools/ |
| D | opcodes.txt | 668 c20 msgfi RIL_RI
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