| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_hwseq.c | 104 uint32_t alpha_mode = 2; in dce_set_blender_mode() local
110 alpha_mode = 0; in dce_set_blender_mode()
115 alpha_mode = 0; in dce_set_blender_mode()
132 BLND_ALPHA_MODE, alpha_mode, in dce_set_blender_mode()
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| /linux-6.6.21/drivers/gpu/drm/rockchip/ |
| D | rockchip_vop_reg.c | 110 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
128 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
198 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
289 .alpha_mode = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 1),
306 .alpha_mode = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 1),
323 .alpha_mode = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 1),
388 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 21),
407 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 22),
422 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 23),
511 .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 18),
[all …]
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| D | rockchip_drm_vop.h | 204 struct vop_reg alpha_mode; member
291 enum alpha_mode { enum
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| D | rockchip_drm_vop2.c | 110 u32 alpha_mode:1; member
1697 alpha->src_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; in vop2_parse_alpha()
1700 alpha->dst_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; in vop2_parse_alpha()
1707 alpha->src_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; in vop2_parse_alpha()
1712 alpha->dst_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; in vop2_parse_alpha()
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| D | rockchip_drm_vop.c | 1045 VOP_WIN_SET(vop, win, alpha_mode, ALPHA_PER_PIX); in vop_plane_atomic_update()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | mpc.h | 97 enum mpcc_alpha_blend_mode alpha_mode; /* alpha blend mode */ member
191 uint32_t alpha_mode; member
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| /linux-6.6.21/drivers/gpu/drm/logicvc/ |
| D | logicvc_layer.c | 191 if (layer->config.alpha_mode == LOGICVC_LAYER_ALPHA_LAYER) { in logicvc_plane_atomic_update()
358 alpha = (layer->config.alpha_mode == LOGICVC_LAYER_ALPHA_PIXEL); in logicvc_layer_formats_lookup()
407 &config->alpha_mode); in logicvc_layer_config_parse()
537 if (layer->config.alpha_mode == LOGICVC_LAYER_ALPHA_LAYER) in logicvc_layer_init()
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| D | logicvc_layer.h | 29 u32 alpha_mode; member
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_mpc.c | 85 MPCC_ALPHA_BLND_MODE, blnd_cfg->alpha_mode, in mpc1_update_blending()
469 MPCC_ALPHA_BLND_MODE, &s->alpha_mode, in mpc1_read_mpcc_state()
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| D | dcn10_hw_sequencer_debug.c | 403 s.mode, s.alpha_mode, s.pre_multiplied_alpha, s.overlap_only, in dcn10_get_mpcc_states()
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| D | dcn10_hw_sequencer.c | 347 s.mode, s.alpha_mode, s.pre_multiplied_alpha, s.overlap_only, in dcn10_log_hw_state()
2619 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; in dcn10_update_mpcc()
2622 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; in dcn10_update_mpcc()
2626 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; in dcn10_update_mpcc()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn201/ |
| D | dcn201_hwseq.c | 442 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; in dcn201_update_mpcc()
444 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; in dcn201_update_mpcc()
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| /linux-6.6.21/drivers/video/fbdev/ |
| D | au1200fb.c | 116 unsigned int alpha_mode; member
1311 val |= ((pdata->alpha_mode << 1) & LCD_WINCTRL0_AEN); in set_window()
1397 pdata->alpha_mode = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_AEN) >> 1; in get_window()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_mpc.c | 58 MPCC_ALPHA_BLND_MODE, blnd_cfg->alpha_mode, in mpc2_update_blending()
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| D | dcn20_hwseq.c | 2605 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; in dcn20_update_mpcc()
2608 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; in dcn20_update_mpcc()
2612 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; in dcn20_update_mpcc()
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| /linux-6.6.21/drivers/media/pci/ivtv/ |
| D | ivtv-ioctl.c | 1527 static const char * const alpha_mode[4] = { in ivtv_log_status() local
1562 alpha_mode[(data[0] >> 1) & 0x3], in ivtv_log_status()
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