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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c349 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn316_build_watermark_ranges()
350 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn316_build_watermark_ranges()
352 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn316_build_watermark_ranges()
353 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
355 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn316_build_watermark_ranges()
357 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn316_build_watermark_ranges()
360 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn316_build_watermark_ranges()
363 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn316_build_watermark_ranges()
368 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn316_build_watermark_ranges()
369 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
[all …]
Ddcn316_smu.h98 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c397 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in vg_build_watermark_ranges()
398 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in vg_build_watermark_ranges()
400 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in vg_build_watermark_ranges()
401 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
403 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in vg_build_watermark_ranges()
405 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in vg_build_watermark_ranges()
408 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in vg_build_watermark_ranges()
411 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in vg_build_watermark_ranges()
416 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in vg_build_watermark_ranges()
417 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
[all …]
Ddcn301_smu.h77 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
131 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c432 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn31_build_watermark_ranges()
433 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn31_build_watermark_ranges()
435 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn31_build_watermark_ranges()
436 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
438 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn31_build_watermark_ranges()
440 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn31_build_watermark_ranges()
443 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn31_build_watermark_ranges()
446 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn31_build_watermark_ranges()
451 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn31_build_watermark_ranges()
452 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
[all …]
Ddcn31_smu.h74 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
231 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c384 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn315_build_watermark_ranges()
385 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn315_build_watermark_ranges()
387 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn315_build_watermark_ranges()
388 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
390 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn315_build_watermark_ranges()
392 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn315_build_watermark_ranges()
395 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn315_build_watermark_ranges()
398 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn315_build_watermark_ranges()
403 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn315_build_watermark_ranges()
404 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
[all …]
Ddcn315_smu.h90 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_clk_mgr.c447 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn314_build_watermark_ranges()
448 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn314_build_watermark_ranges()
450 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn314_build_watermark_ranges()
451 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges()
453 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn314_build_watermark_ranges()
455 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn314_build_watermark_ranges()
458 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn314_build_watermark_ranges()
461 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn314_build_watermark_ranges()
466 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn314_build_watermark_ranges()
467 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges()
[all …]
Ddcn314_smu.h72 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu_helper.c728 table->WatermarkRow[1][i].MinClock = in smu_set_watermarks_for_clocks_ranges()
732 table->WatermarkRow[1][i].MaxClock = in smu_set_watermarks_for_clocks_ranges()
736 table->WatermarkRow[1][i].MinUclk = in smu_set_watermarks_for_clocks_ranges()
740 table->WatermarkRow[1][i].MaxUclk = in smu_set_watermarks_for_clocks_ranges()
744 table->WatermarkRow[1][i].WmSetting = (uint8_t) in smu_set_watermarks_for_clocks_ranges()
749 table->WatermarkRow[0][i].MinClock = in smu_set_watermarks_for_clocks_ranges()
753 table->WatermarkRow[0][i].MaxClock = in smu_set_watermarks_for_clocks_ranges()
757 table->WatermarkRow[0][i].MinUclk = in smu_set_watermarks_for_clocks_ranges()
761 table->WatermarkRow[0][i].MaxUclk = in smu_set_watermarks_for_clocks_ranges()
765 table->WatermarkRow[0][i].WmSetting = (uint8_t) in smu_set_watermarks_for_clocks_ranges()
/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0_5_ppt.c416 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v13_0_5_set_watermarks_table()
418 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table()
420 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v13_0_5_set_watermarks_table()
422 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v13_0_5_set_watermarks_table()
425 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v13_0_5_set_watermarks_table()
430 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v13_0_5_set_watermarks_table()
432 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table()
434 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v13_0_5_set_watermarks_table()
436 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v13_0_5_set_watermarks_table()
439 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v13_0_5_set_watermarks_table()
Dsmu_v13_0_4_ppt.c660 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v13_0_4_set_watermarks_table()
662 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table()
664 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v13_0_4_set_watermarks_table()
666 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v13_0_4_set_watermarks_table()
669 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v13_0_4_set_watermarks_table()
674 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v13_0_4_set_watermarks_table()
676 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table()
678 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v13_0_4_set_watermarks_table()
680 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v13_0_4_set_watermarks_table()
683 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v13_0_4_set_watermarks_table()
Dyellow_carp_ppt.c507 table->WatermarkRow[WM_DCFCLK][i].MinClock = in yellow_carp_set_watermarks_table()
509 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in yellow_carp_set_watermarks_table()
511 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in yellow_carp_set_watermarks_table()
513 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in yellow_carp_set_watermarks_table()
516 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in yellow_carp_set_watermarks_table()
521 table->WatermarkRow[WM_SOCCLK][i].MinClock = in yellow_carp_set_watermarks_table()
523 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in yellow_carp_set_watermarks_table()
525 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in yellow_carp_set_watermarks_table()
527 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in yellow_carp_set_watermarks_table()
530 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in yellow_carp_set_watermarks_table()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c341 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinClock = clk_mgr->base.bw_params->wm_table.nv_entr… in dcn3_notify_wm_ranges()
342 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxClock = clk_mgr->base.bw_params->wm_table.nv_entr… in dcn3_notify_wm_ranges()
343 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinUclk = clk_mgr->base.bw_params->wm_table.nv_entri… in dcn3_notify_wm_ranges()
344 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxUclk = clk_mgr->base.bw_params->wm_table.nv_entri… in dcn3_notify_wm_ranges()
345 table->Watermarks.WatermarkRow[WM_DCEFCLK][i].WmSetting = i; in dcn3_notify_wm_ranges()
346 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries… in dcn3_notify_wm_ranges()
Ddcn30_smu11_driver_if.h53 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c1057 table->WatermarkRow[WM_DCFCLK][i].MinClock = in renoir_set_watermarks_table()
1059 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in renoir_set_watermarks_table()
1061 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in renoir_set_watermarks_table()
1063 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in renoir_set_watermarks_table()
1066 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in renoir_set_watermarks_table()
1068 table->WatermarkRow[WM_DCFCLK][i].WmType = in renoir_set_watermarks_table()
1073 table->WatermarkRow[WM_SOCCLK][i].MinClock = in renoir_set_watermarks_table()
1075 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in renoir_set_watermarks_table()
1077 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in renoir_set_watermarks_table()
1079 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in renoir_set_watermarks_table()
[all …]
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
Ddcn32_smu13_driver_if.h42 WatermarkRowGeneric_t WatermarkRow[NUM_WM_RANGES]; member
Dsmu13_driver_if.h75 WatermarkRowGeneric_t WatermarkRow[NUM_WM_RANGES]; member
/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/inc/
Dsmu10_driver_if.h70 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
Dsmu13_driver_if_v13_0_5.h73 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
Dsmu12_driver_if.h73 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
Dsmu13_driver_if_yellow_carp.h72 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
Dsmu11_driver_if_vangogh.h72 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dvangogh_ppt.c1638 table->WatermarkRow[WM_DCFCLK][i].MinClock = in vangogh_set_watermarks_table()
1640 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in vangogh_set_watermarks_table()
1642 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in vangogh_set_watermarks_table()
1644 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in vangogh_set_watermarks_table()
1647 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in vangogh_set_watermarks_table()
1652 table->WatermarkRow[WM_SOCCLK][i].MinClock = in vangogh_set_watermarks_table()
1654 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in vangogh_set_watermarks_table()
1656 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in vangogh_set_watermarks_table()
1658 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in vangogh_set_watermarks_table()
1661 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in vangogh_set_watermarks_table()

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