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Searched refs:VoltageLevel (Results 1 – 15 of 15) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_mode_vba_32.c78 dml_print("DML::%s: mode_lib->vba.VoltageLevel = %d\n", __func__, mode_lib->vba.VoltageLevel); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
366 mode_lib->vba.OutputBppPerState[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
538 mode_lib->vba.VoltageLevel, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
602 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = mode_lib->vba.WritebackLatency in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
613 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
617 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
618 dml_max(v->WritebackDelay[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
637 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
638 v->WritebackDelay[mode_lib->vba.VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
700 dml_ceil((double) v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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Ddcn32_fpu.c549 unsigned int vlevel = context->bw_ctx.dml.vba.VoltageLevel; in dcn32_set_phantom_stream_timing()
591 num_dpp = vba->NoOfDPP[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]]; in dcn32_set_phantom_stream_timing()
705 …(vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_pla… in dcn32_assign_subvp_pipe()
706 …(vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_pla… in dcn32_assign_subvp_pipe()
1179 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper()
1277 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper()
1294 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper()
1435 …if (vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_… in dcn32_calculate_dlg_params()
1705 vba->VoltageLevel = vlevel; in dcn32_internal_validate_bw()
1934 vba->VoltageLevel = i; in dcn32_internal_validate_bw()
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Ddisplay_mode_vba_util_32.h691 const int VoltageLevel,
698 const int VoltageLevel,
Ddisplay_mode_vba_util_32.c3282 const int VoltageLevel, in dml32_get_return_bw_mbps() argument
3294 IdealDRAMBandwidth * (VoltageLevel < 2 ? soc->pct_ideal_dram_bw_after_urgent_strobe : in dml32_get_return_bw_mbps()
3298 IdealDRAMBandwidth * (VoltageLevel < 2 ? soc->pct_ideal_dram_bw_after_urgent_strobe : in dml32_get_return_bw_mbps()
3307 dml_print("DML::%s: VoltageLevel = %d\n", __func__, VoltageLevel); in dml32_get_return_bw_mbps()
3325 const int VoltageLevel, in dml32_get_return_bw_mbps_vm_only() argument
3335 * (VoltageLevel < 2 ? in dml32_get_return_bw_mbps_vm_only()
3339 dml_print("DML::%s: VoltageLevel = %d\n", __func__, VoltageLevel); in dml32_get_return_bw_mbps_vm_only()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20.c1890 &mode_lib->vba.PTEBufferSizeNotExceeded[mode_lib->vba.VoltageLevel][0], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1932 &mode_lib->vba.PTEBufferSizeNotExceeded[mode_lib->vba.VoltageLevel][0], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1982 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1995 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1999 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2001 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2021 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2022 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][j]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2031 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2058 mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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Ddisplay_mode_vba_20v2.c1926 &mode_lib->vba.PTEBufferSizeNotExceeded[mode_lib->vba.VoltageLevel][0], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1968 &mode_lib->vba.PTEBufferSizeNotExceeded[mode_lib->vba.VoltageLevel][0], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2018 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2031 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2035 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2037 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2057 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2058 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][j]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2067 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2094 mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_vba.c79 return mode_lib->vba.VoltageLevel; in dml_get_voltage_level()
377 if (soc->clock_limits[i].state == mode_lib->vba.VoltageLevel) in fetch_socbb_params()
1083 mode_lib->vba.VoltageLevel = mode_lib->vba.cache_pipes[0].clks_cfg.voltage; in ModeSupportAndSystemConfiguration()
1084 …mode_lib->vba.ReturnBW = mode_lib->vba.ReturnBWPerState[mode_lib->vba.VoltageLevel][mode_lib->vba.… in ModeSupportAndSystemConfiguration()
1086 mode_lib->vba.ReturnBW = mode_lib->vba.ReturnBWPerState[mode_lib->vba.VoltageLevel][0]; in ModeSupportAndSystemConfiguration()
1087 ….FabricAndDRAMBandwidth = mode_lib->vba.FabricAndDRAMBandwidthPerState[mode_lib->vba.VoltageLevel]; in ModeSupportAndSystemConfiguration()
1098 mode_lib->vba.DISPCLK = soc->clock_limits[mode_lib->vba.VoltageLevel].dispclk_mhz; in ModeSupportAndSystemConfiguration()
1107 mode_lib->vba.DPPCLK[k] = soc->clock_limits[mode_lib->vba.VoltageLevel].dppclk_mhz; in ModeSupportAndSystemConfiguration()
Ddisplay_mode_vba.h433 int VoltageLevel; member
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c2044 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2057 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2061 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2063 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2083 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2084 locals->WritebackDelay[mode_lib->vba.VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2088 …ctive[k] - dml_max(1.0, dml_ceil(locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] / (mode_lib… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2104 mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2419 mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2565 if (mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb] == 0) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c1858 unsigned int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1870 v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] = dml_min3( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1872 v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * v->DRAMChannelWidth, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1873 v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1875 …v->ReturnBW = v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] * v->PercentOfIdeal… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1877 …v->ReturnBW = v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] * v->PercentOfIdeal… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2133 double BPP = v->OutputBppPerState[k][v->VoltageLevel]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2362 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency + in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2372 v->WritebackDelay[v->VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2376 v->WritebackDelay[v->VoltageLevel][k] = dml_max(v->WritebackDelay[v->VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_mode_vba_31.c2007 int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb];
2016 v->ReturnBusWidth * v->DCFCLKState[v->VoltageLevel][v->maxMpcComb],
2017 v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn);
2018 …double IdealDRAMBandwidthPerState = v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * …
2515 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency
2526 v->WritebackDelay[v->VoltageLevel][k] = 0;
2529 v->WritebackDelay[v->VoltageLevel][k] = dml_max(
2530 v->WritebackDelay[v->VoltageLevel][k],
2549 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j];
2559 (double) v->WritebackDelay[v->VoltageLevel][k]
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Ddcn31_fpu.c469 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_mode_vba_314.c2027 int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb];
2036 v->ReturnBusWidth * v->DCFCLKState[v->VoltageLevel][v->maxMpcComb],
2037 v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn);
2038 …double IdealDRAMBandwidthPerState = v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * …
2536 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency
2547 v->WritebackDelay[v->VoltageLevel][k] = 0;
2550 v->WritebackDelay[v->VoltageLevel][k] = dml_max(
2551 v->WritebackDelay[v->VoltageLevel][k],
2570 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j];
2583 v->WritebackDelay[v->VoltageLevel][k]);
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/core/
Ddc_hw_sequencer.c804 if (vba->DRAMClockChangeSupport[vba->VoltageLevel][vba->maxMpcComb] != in get_mclk_switch_visual_confirm_color()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c1647 context->bw_ctx.dml.vba.VoltageLevel = 0; in dcn30_internal_validate_bw()
1868 context->bw_ctx.dml.vba.VoltageLevel = vlevel; in dcn30_internal_validate_bw()