Home
last modified time | relevance | path

Searched refs:VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_sh_mask.h5268 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x0 macro
Dgmc_8_2_sh_mask.h6390 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x0 macro
Dgmc_6_0_sh_mask.h11841 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x00000000 macro
Dgmc_7_1_sh_mask.h5910 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x0 macro
Dgmc_8_1_sh_mask.h6512 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x0 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_9_1_sh_mask.h7403 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro
Dmmhub_1_0_sh_mask.h7740 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro
Dmmhub_9_3_0_sh_mask.h7830 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro
Dmmhub_1_8_0_sh_mask.h19752 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro
Dmmhub_1_7_sh_mask.h29668 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h6668 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro
Dgc_9_1_sh_mask.h6482 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro
Dgc_9_2_1_sh_mask.h6305 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro
Dgc_9_4_3_sh_mask.h8957 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro
Dgc_9_4_2_sh_mask.h29186 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT macro