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Searched refs:UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK (Results 1 – 8 of 8) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Djpeg_v1_0.c531 UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK); in jpeg_v1_0_start()
536 WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_CNTL, UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK); in jpeg_v1_0_start()
Dvcn_v1_0.c1311 UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK); in vcn_v1_0_pause_dpg_mode()
1319 UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK); in vcn_v1_0_pause_dpg_mode()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h730 #define UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK macro
Dvcn_2_5_sh_mask.h708 #define UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK macro
Dvcn_2_0_0_sh_mask.h705 #define UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK macro
Dvcn_2_6_0_sh_mask.h2537 #define UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK macro
Dvcn_3_0_0_sh_mask.h867 #define UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK macro
Dvcn_4_0_0_sh_mask.h5248 #define UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK macro