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Searched refs:UVD_CGC_STATUS__MPC_DCLK__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_3_1_sh_mask.h204 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT 0x14 macro
Duvd_4_0_sh_mask.h165 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT 0x00000014 macro
Duvd_4_2_sh_mask.h204 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT 0x14 macro
Duvd_5_0_sh_mask.h220 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT 0x14 macro
Duvd_6_0_sh_mask.h222 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT 0x14 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h866 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT … macro
Dvcn_2_5_sh_mask.h1936 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT … macro
Dvcn_2_0_0_sh_mask.h1886 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT … macro
Dvcn_2_6_0_sh_mask.h3607 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT … macro
Dvcn_3_0_0_sh_mask.h2666 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT … macro
Dvcn_4_0_0_sh_mask.h3829 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT … macro
Dvcn_4_0_3_sh_mask.h3864 #define UVD_CGC_STATUS__MPC_DCLK__SHIFT … macro