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Searched refs:TB_CFG_SWITCH (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/drivers/thunderbolt/
Dlc.c20 return tb_sw_read(sw, uuid, TB_CFG_SWITCH, sw->cap_lc + TB_LC_FUSE, 4); in tb_lc_read_uuid()
27 return tb_sw_read(sw, desc, TB_CFG_SWITCH, sw->cap_lc + TB_LC_DESC, 1); in read_lc_desc()
62 ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_set_port_configured()
82 return tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_set_port_configured()
120 ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_set_xdomain_configured()
135 return tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_set_xdomain_configured()
187 ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_start_lane_initialization()
193 return tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1); in tb_lc_start_lane_initialization()
213 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, cap + TB_LC_LINK_ATTR, 1); in tb_lc_is_clx_supported()
239 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, cap + TB_LC_CS_42, 1); in tb_lc_is_usb_plugged()
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Dtmu.c72 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_set_tmu_mode_params()
80 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, in tb_switch_set_tmu_mode_params()
85 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_set_tmu_mode_params()
99 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, in tb_switch_set_tmu_mode_params()
107 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_set_tmu_mode_params()
115 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, in tb_switch_set_tmu_mode_params()
127 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_ucap_is_supported()
140 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_rate_read()
154 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_rate_write()
162 return tb_sw_write(sw, &val, TB_CFG_SWITCH, in tb_switch_tmu_rate_write()
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Dcap.c35 ret = tb_sw_read(sw, &value, TB_CFG_SWITCH, offset, 1); in tb_port_enable_tmu()
44 return tb_sw_write(sw, &value, TB_CFG_SWITCH, offset, 1); in tb_port_enable_tmu()
153 ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 2); in tb_switch_next_cap()
200 ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 1); in tb_switch_find_cap()
233 ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 1); in tb_switch_find_vse_cap()
Dusb4.c64 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1); in usb4_native_switch_op()
69 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9, in usb4_native_switch_op()
76 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1); in usb4_native_switch_op()
84 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1); in usb4_native_switch_op()
96 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1); in usb4_native_switch_op()
101 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9, in usb4_native_switch_op()
170 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1)) in usb4_switch_check_wakes()
252 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1); in usb4_switch_setup()
266 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1); in usb4_switch_setup()
295 return tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1); in usb4_switch_setup()
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Dclx.c262 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, in tb_switch_mask_clx_objections()
272 return tb_sw_write(sw, &val, TB_CFG_SWITCH, in tb_switch_mask_clx_objections()
Deeprom.c20 return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + ROUTER_CS_4, 1); in tb_eeprom_ctl_write()
28 return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + ROUTER_CS_4, 1); in tb_eeprom_ctl_read()
146 res = tb_sw_read(sw, &cap, TB_CFG_SWITCH, sw->cap_plug_events, in tb_eeprom_get_drom_offset()
Dswitch.c1504 TB_CFG_SWITCH, 2, 2); in tb_switch_reset()
1534 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1); in tb_switch_wait_for_bit()
1563 res = tb_sw_write(sw, ((u32 *) &sw->config) + 4, TB_CFG_SWITCH, 4, 1); in tb_plug_events_active()
1567 res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1); in tb_plug_events_active()
1590 return tb_sw_write(sw, &data, TB_CFG_SWITCH, in tb_plug_events_active()
2288 ret = tb_cfg_read(tb->ctl, &sw->config, route, 0, TB_CFG_SWITCH, 0, 5); in tb_switch_alloc()
2444 ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, in tb_switch_configure()
2461 ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, in tb_switch_configure()
3455 ret = tb_sw_write(sw, &value, TB_CFG_SWITCH, offset, 1); in tb_switch_pcie_bridge_write()
3468 ret = tb_sw_write(sw, &command, TB_CFG_SWITCH, offset, 1); in tb_switch_pcie_bridge_write()
[all …]
Ddebugfs.c155 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, offset, 1); in regs_write()
1105 ret = tb_sw_read(sw, &data, TB_CFG_SWITCH, cap + offset + i, 1); in cap_show_by_dw()
1130 ret = tb_sw_read(sw, data, TB_CFG_SWITCH, cap + offset, dwords); in cap_show()
1295 ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, cap, 1); in switch_cap_show()
1303 ret = tb_sw_read(sw, (u32 *)&header + 1, TB_CFG_SWITCH, in switch_cap_show()
1351 ret = tb_sw_read(sw, data, TB_CFG_SWITCH, 0, dwords); in switch_basic_regs_show()
Dtb_msgs.h18 TB_CFG_SWITCH = 2, enumerator
Dicm.c1008 return pcie2cio_write(tb_priv(tb), TB_CFG_SWITCH, 0, 0x777, BIT(1)); in icm_tr_cio_reset()
1463 return pcie2cio_write(tb_priv(tb), TB_CFG_SWITCH, 0, 0x50, BIT(9)); in icm_ar_cio_reset()
1777 res = tb_cfg_read_raw(tb->ctl, &tmp, 0, 0, TB_CFG_SWITCH, in __icm_driver_ready()
Dctl.c1137 TB_CFG_SWITCH, 0, 1, in tb_cfg_get_upstream_port()