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Searched refs:TARGET_DEV5G (Results 1 – 3 of 3) sorted by relevance

/linux-6.6.21/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main.c59 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */
62 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */
65 { TARGET_DEV5G + 2, 0x10020000, 1 }, /* 0x610020000 */
68 { TARGET_DEV5G + 6, 0x1002c000, 1 }, /* 0x61002c000 */
71 { TARGET_DEV5G + 7, 0x10038000, 1 }, /* 0x610038000 */
74 { TARGET_DEV5G + 8, 0x10044000, 1 }, /* 0x610044000 */
77 { TARGET_DEV5G + 9, 0x10050000, 1 }, /* 0x610050000 */
80 { TARGET_DEV5G + 10, 0x1005c000, 1 }, /* 0x61005c000 */
83 { TARGET_DEV5G + 11, 0x10068000, 1 }, /* 0x610068000 */
128 { TARGET_DEV5G + 12, 0x10128000, 1 }, /* 0x610128000 */
[all …]
Dsparx5_main_regs.h32 TARGET_DEV5G = 102, enumerator
3283 #define DEV5G_MAC_ENA_CFG(t) __REG(TARGET_DEV5G,\
3299 #define DEV5G_MAC_MAXLEN_CFG(t) __REG(TARGET_DEV5G,\
3315 #define DEV5G_MAC_ADV_CHK_CFG(t) __REG(TARGET_DEV5G,\
3361 #define DEV5G_RX_SYMBOL_ERR_CNT(t) __REG(TARGET_DEV5G,\
3365 #define DEV5G_RX_PAUSE_CNT(t) __REG(TARGET_DEV5G,\
3369 #define DEV5G_RX_UNSUP_OPCODE_CNT(t) __REG(TARGET_DEV5G,\
3373 #define DEV5G_RX_UC_CNT(t) __REG(TARGET_DEV5G,\
3377 #define DEV5G_RX_MC_CNT(t) __REG(TARGET_DEV5G,\
3381 #define DEV5G_RX_BC_CNT(t) __REG(TARGET_DEV5G,\
[all …]
Dsparx5_port.h46 return TARGET_DEV5G; in sparx5_to_high_dev()