Searched refs:SYS_DESC (Results 1 – 4 of 4) sorted by relevance
/linux-6.6.21/arch/arm64/kvm/ |
D | sys_regs.c | 1108 { SYS_DESC(SYS_DBGBVRn_EL1(n)), \ 1110 { SYS_DESC(SYS_DBGBCRn_EL1(n)), \ 1112 { SYS_DESC(SYS_DBGWVRn_EL1(n)), \ 1114 { SYS_DESC(SYS_DBGWCRn_EL1(n)), \ 1118 SYS_DESC(SYS_##name), .reset = reset_pmu_reg, \ 1142 #define AMU_AMEVCNTR0_EL0(n) { SYS_DESC(SYS_AMEVCNTR0_EL0(n)), undef_access } 1143 #define AMU_AMEVTYPER0_EL0(n) { SYS_DESC(SYS_AMEVTYPER0_EL0(n)), undef_access } 1144 #define AMU_AMEVCNTR1_EL0(n) { SYS_DESC(SYS_AMEVCNTR1_EL0(n)), undef_access } 1145 #define AMU_AMEVTYPER1_EL0(n) { SYS_DESC(SYS_AMEVTYPER1_EL0(n)), undef_access } 1160 { SYS_DESC(SYS_## k), undef_access, reset_unknown, k, \ [all …]
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D | vgic-sys-reg-v3.c | 301 { SYS_DESC(SYS_ICC_PMR_EL1), 303 { SYS_DESC(SYS_ICC_BPR0_EL1), 305 { SYS_DESC(SYS_ICC_AP0R0_EL1), 307 { SYS_DESC(SYS_ICC_AP0R1_EL1), 309 { SYS_DESC(SYS_ICC_AP0R2_EL1), 311 { SYS_DESC(SYS_ICC_AP0R3_EL1), 313 { SYS_DESC(SYS_ICC_AP1R0_EL1), 315 { SYS_DESC(SYS_ICC_AP1R1_EL1), 317 { SYS_DESC(SYS_ICC_AP1R2_EL1), 319 { SYS_DESC(SYS_ICC_AP1R3_EL1), [all …]
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D | sys_regs.h | 243 #define SYS_DESC(reg) \ macro
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/linux-6.6.21/arch/arm64/kvm/hyp/nvhe/ |
D | sys_regs.c | 316 #define AARCH32(REG) { SYS_DESC(REG), .access = pvm_access_id_aarch32 } 319 #define AARCH64(REG) { SYS_DESC(REG), .access = pvm_access_id_aarch64 } 332 #define RAZ_WI(REG) { SYS_DESC(REG), .access = pvm_access_raz_wi } 335 #define HOST_HANDLED(REG) { SYS_DESC(REG), .access = NULL } 433 { SYS_DESC(SYS_ICC_SRE_EL1), .access = pvm_gic_read_sre, },
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