Searched refs:STBCR3 (Results 1 – 6 of 6) sorted by relevance
| /linux-6.6.21/arch/sh/kernel/cpu/sh2a/ |
| D | clock-sh7264.c | 17 #define STBCR3 0xfffe0408 macro
97 [MSTP35] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 6, 0), /* MTU2 */
98 [MSTP34] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 4, 0), /* SDHI0 */
99 [MSTP33] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 3, 0), /* SDHI1 */
100 [MSTP32] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 2, 0), /* ADC */
101 [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
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| D | clock-sh7269.c | 17 #define STBCR3 0xfffe0408 macro
133 [MSTP35] = SH_CLK_MSTP8(&peripheral0_clk, STBCR3, 5, 0), /* MTU2 */
134 [MSTP32] = SH_CLK_MSTP8(&peripheral1_clk, STBCR3, 2, 0), /* ADC */
135 [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
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| D | setup-sh7206.c | 278 #define STBCR3 0xfffe0408 macro
287 __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3); in plat_early_device_setup()
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| D | setup-sh7201.c | 409 #define STBCR3 0xfffe0408 macro
414 __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3); in plat_early_device_setup()
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| D | setup-sh7203.c | 342 #define STBCR3 0xfffe0408 macro
351 __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3); in plat_early_device_setup()
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| /linux-6.6.21/arch/sh/kernel/cpu/sh2/ |
| D | setup-sh7619.c | 196 #define STBCR3 0xf80a0000 macro
201 __raw_writeb(__raw_readb(STBCR3) & ~0x10, STBCR3); in plat_early_device_setup()
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