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Searched refs:SSPP_CURSOR1 (Results 1 – 8 of 8) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_pipe.h11 #define SSPP_MAX (SSPP_CURSOR1 + 1)
Dmdp5_ctl.c303 case SSPP_CURSOR1: in mdp_ctl_blend_mask()
311 if (stage < STAGE6 && (pipe != SSPP_CURSOR0 && pipe != SSPP_CURSOR1)) in mdp_ctl_blend_ext_mask()
326 case SSPP_CURSOR1: return MDP5_CTL_LAYER_EXT_REG_CURSOR1(stage); in mdp_ctl_blend_ext_mask()
454 case SSPP_CURSOR1: return MDP5_CTL_FLUSH_CURSOR_1; in mdp_ctl_flush_mask_pipe()
Dmdp5_kms.c694 SSPP_CURSOR0, SSPP_CURSOR1, in hwpipe_init() enumerator
Dmdp5.xml.h87 SSPP_CURSOR1 = 12, enumerator
561 case SSPP_CURSOR1: return (mdp5_cfg->pipe_cursor.base[1]); in __offset_PIPE()
/linux-6.6.21/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_top.c126 status->sspp[SSPP_CURSOR1] = (value >> 26) & 0x3; in dpu_hw_get_danger_status()
238 status->sspp[SSPP_CURSOR1] = (value >> 26) & 0x1; in dpu_hw_get_safe_status()
Ddpu_hw_mdss.h121 SSPP_CURSOR1, enumerator
Ddpu_hw_ctl.c210 case SSPP_CURSOR1: in dpu_hw_ctl_update_pending_flush_sspp()
440 [SSPP_CURSOR1] = { { 1, 26 }, { -1 } },
Ddpu_plane.c278 pipe->sspp->idx != SSPP_CURSOR1 && in _dpu_plane_set_qos_lut()
1077 pipe->sspp->idx != SSPP_CURSOR1) in dpu_plane_sspp_update_pipe()