Searched refs:SPI0 (Results 1 – 20 of 20) sorted by relevance
1 Broadcom BCM2835 SPI0 controller4 SPI0, and the other known as the "Universal SPI Master"; part of the5 auxiliary block. This binding applies to the SPI0 controller.
4 SPI0, and the other known as the "Universal SPI Master"; part of the
74 <MBUS_ID(0x01, 0x5e) 0 0 0xf1100000 0x10000>, /* SPI0-DEV1 */
13 - al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0
346 SPI0, SPI1, enumerator381 INTC_VECT(SPI0, 0x960), INTC_VECT(SPI1, 0x980),413 INTC_GROUP(SPI, SPI0, SPI1),
800 SPI0, SPI1, enumerator878 INTC_VECT(SPI0, 0xcc0),974 ADC1, 0, DMAC6_7, ADC0, SPI0, SIM, PECI2, PECI1,1071 { INT2PRI10, 0, 32, 8, { SPI0, SIM, PECI2, PECI1 } },
430 * [7] CP1 SPI0 CSn1 (FXS)431 * [8] CP1 SPI0 CSn0 (TPM)432 * [9.11]CP1 SPI0 MOSI/MISO/CLK
108 label = "LS-SPI0";
133 /* On Low speed expansion (LS-SPI0) */
195 label = "LS-SPI0";
620 label = "LS-SPI0";
113 label = "LS-SPI0";
277 /* LS-SPI0 */
130 - description: SPI0 clock (from CMU_TOP)
304 * Disable SPI0 in here, to prefer the more useful eMMC. U-Boot can
94 * Default SPI0 pinctrl setting with CSn on mpp0,
114 /* LS-SPI0 */
527 label = "LS-SPI0";
218 /* On Low speed expansion: LS-SPI0 */
242 /* SPI0 */