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Searched refs:SH_MEM_BASES__SHARED_BASE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h12655 #define SH_MEM_BASES__SHARED_BASE_MASK 0xffff0000 macro
Dgfx_8_0_sh_mask.h14541 #define SH_MEM_BASES__SHARED_BASE_MASK 0xffff0000 macro
Dgfx_8_1_sh_mask.h14939 #define SH_MEM_BASES__SHARED_BASE_MASK 0xffff0000 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h2229 #define SH_MEM_BASES__SHARED_BASE_MASK … macro
Dgc_9_1_sh_mask.h2077 #define SH_MEM_BASES__SHARED_BASE_MASK … macro
Dgc_9_2_1_sh_mask.h2100 #define SH_MEM_BASES__SHARED_BASE_MASK … macro
Dgc_9_4_3_sh_mask.h2247 #define SH_MEM_BASES__SHARED_BASE_MASK … macro
Dgc_9_4_2_sh_mask.h25530 #define SH_MEM_BASES__SHARED_BASE_MASK … macro
Dgc_11_0_0_sh_mask.h24675 #define SH_MEM_BASES__SHARED_BASE_MASK … macro
Dgc_10_1_0_sh_mask.h7781 #define SH_MEM_BASES__SHARED_BASE_MASK … macro
Dgc_11_0_3_sh_mask.h27031 #define SH_MEM_BASES__SHARED_BASE_MASK … macro
Dgc_10_3_0_sh_mask.h8116 #define SH_MEM_BASES__SHARED_BASE_MASK … macro