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Searched refs:SDMA1_STATUS_REG__SEM_IDLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h503 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT 0x1a macro
Dsdma1_4_2_2_sh_mask.h505 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT … macro
Dsdma1_4_2_sh_mask.h501 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1472 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT 0x1a macro
Doss_2_4_sh_mask.h1636 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT 0x1a macro
Doss_3_0_1_sh_mask.h2154 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT 0x1a macro
Doss_3_0_sh_mask.h2458 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT 0x1a macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h3008 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h2714 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT … macro
Dgc_10_1_0_sh_mask.h2983 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT … macro
Dgc_11_0_3_sh_mask.h2785 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT … macro
Dgc_10_3_0_sh_mask.h3092 #define SDMA1_STATUS_REG__SEM_IDLE__SHIFT … macro