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Searched refs:SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h492 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
Dsdma1_4_2_2_sh_mask.h494 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT macro
Dsdma1_4_2_sh_mask.h490 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1454 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
Doss_2_4_sh_mask.h1614 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
Doss_3_0_1_sh_mask.h2132 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
Doss_3_0_sh_mask.h2436 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h2997 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h2703 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT macro
Dgc_10_1_0_sh_mask.h2972 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT macro
Dgc_11_0_3_sh_mask.h2772 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT macro
Dgc_10_3_0_sh_mask.h3081 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT macro