Home
last modified time | relevance | path

Searched refs:SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h538 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT 0x0 macro
Dsdma1_4_2_2_sh_mask.h540 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT … macro
Dsdma1_4_2_sh_mask.h536 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1482 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT 0x0 macro
Doss_2_4_sh_mask.h1646 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT 0x0 macro
Doss_3_0_1_sh_mask.h2164 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT 0x0 macro
Doss_3_0_sh_mask.h2468 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT 0x0 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h3043 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h2749 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT … macro
Dgc_10_1_0_sh_mask.h3018 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT … macro
Dgc_11_0_3_sh_mask.h2822 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT … macro
Dgc_10_3_0_sh_mask.h3127 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE__SHIFT … macro