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Searched refs:SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h552 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK 0x00000001L macro
Dsdma1_4_2_2_sh_mask.h554 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK … macro
Dsdma1_4_2_sh_mask.h550 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1481 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK 0x1 macro
Doss_2_4_sh_mask.h1645 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK 0x1 macro
Doss_3_0_1_sh_mask.h2163 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK 0x1 macro
Doss_3_0_sh_mask.h2467 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK 0x1 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h3057 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h2766 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK … macro
Dgc_10_1_0_sh_mask.h3032 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK … macro
Dgc_11_0_3_sh_mask.h2842 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK … macro
Dgc_10_3_0_sh_mask.h3141 #define SDMA1_STATUS1_REG__CE_WREQ_IDLE_MASK … macro