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Searched refs:SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h1440 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT 0x9 macro
Dsdma1_4_2_2_sh_mask.h1454 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT macro
Dsdma1_4_2_sh_mask.h1446 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1642 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT 0x9 macro
Doss_2_4_sh_mask.h1842 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT 0x9 macro
Doss_3_0_1_sh_mask.h2788 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT 0x9 macro
Doss_3_0_sh_mask.h2902 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT 0x9 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h4056 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_sh_mask.h4002 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT macro
Dgc_10_3_0_sh_mask.h4175 #define SDMA1_RLC0_RB_CNTL__RB_SWAP_ENABLE__SHIFT macro