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Searched refs:SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h605 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
Dsdma1_4_2_2_sh_mask.h609 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
Dsdma1_4_2_sh_mask.h605 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1544 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
Doss_2_4_sh_mask.h1714 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
Doss_3_0_1_sh_mask.h2234 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
Doss_3_0_sh_mask.h2538 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h2843 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
Dgc_10_1_0_sh_mask.h3091 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
Dgc_11_0_3_sh_mask.h2923 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
Dgc_10_3_0_sh_mask.h3200 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro