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Searched refs:SDMA0_STATUS_REG__MC_WR_IDLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h526 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
Dsdma0_4_0_sh_mask.h527 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x00002000L macro
Dsdma0_4_2_2_sh_mask.h533 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
Dsdma0_4_2_sh_mask.h527 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h935 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
Doss_2_4_sh_mask.h1015 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
Doss_3_0_1_sh_mask.h1033 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
Doss_3_0_sh_mask.h1539 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h218 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h203 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
Dgc_10_1_0_sh_mask.h235 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
Dgc_11_0_3_sh_mask.h211 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
Dgc_10_3_0_sh_mask.h236 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro