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Searched refs:SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h1606 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro
Dsdma0_4_0_sh_mask.h1800 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT 0x0 macro
Dsdma0_4_2_2_sh_mask.h1822 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro
Dsdma0_4_2_sh_mask.h1812 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1288 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT 0x0 macro
Doss_2_4_sh_mask.h1424 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT 0x0 macro
Doss_3_0_1_sh_mask.h1902 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT 0x0 macro
Doss_3_0_sh_mask.h2212 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT 0x0 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h1612 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_sh_mask.h1592 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro
Dgc_10_3_0_sh_mask.h1635 #define SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro