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Searched refs:SDMA0_PHASE1_QUANTUM__PREFER__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h604 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT … macro
Dsdma0_4_0_sh_mask.h605 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT 0x1e macro
Dsdma0_4_2_2_sh_mask.h613 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT … macro
Dsdma0_4_2_sh_mask.h607 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1022 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT 0x1e macro
Doss_2_4_sh_mask.h1112 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT 0x1e macro
Doss_3_0_1_sh_mask.h1132 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT 0x1e macro
Doss_3_0_sh_mask.h1638 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT 0x1e macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h300 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_sh_mask.h319 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT … macro
Dgc_10_3_0_sh_mask.h320 #define SDMA0_PHASE1_QUANTUM__PREFER__SHIFT … macro