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Searched refs:SCLK_UART4 (Results 1 – 21 of 21) sorted by relevance

/linux-6.6.21/include/dt-bindings/clock/
Drk3368-cru.h34 #define SCLK_UART4 81 macro
Dpx30-cru.h29 #define SCLK_UART4 27 macro
Drk3288-cru.h36 #define SCLK_UART4 81 macro
Drk3308-cru.h25 #define SCLK_UART4 21 macro
Drockchip,rv1126-cru.h94 #define SCLK_UART4 28 macro
Drockchip,rk3588-cru.h198 #define SCLK_UART4 183 macro
Drk3568-cru.h362 #define SCLK_UART4 299 macro
/linux-6.6.21/arch/arm/boot/dts/rockchip/
Drv1126.dtsi332 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Drk3288.dtsi437 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
/linux-6.6.21/drivers/clk/rockchip/
Dclk-rk3368.c271 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
Dclk-rk3288.c279 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
Dclk-px30.c710 GATE(SCLK_UART4, "clk_uart4", "clk_uart4_mux", CLK_SET_RATE_PARENT,
Dclk-rk3308.c377 GATE(SCLK_UART4, "clk_uart4", "clk_uart4_mux", 0,
Dclk-rv1126.c499 GATE(SCLK_UART4, "sclk_uart4", "sclk_uart4_mux", 0,
Dclk-rk3568.c1246 GATE(SCLK_UART4, "sclk_uart4", "sclk_uart4_mux", 0,
Dclk-rk3588.c1272 GATE(SCLK_UART4, "sclk_uart4", "clk_uart4", 0,
/linux-6.6.21/arch/arm64/boot/dts/rockchip/
Drk3368.dtsi364 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Drk3308.dtsi348 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Drk356x.dtsi1382 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Dpx30.dtsi549 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Drk3588s.dtsi1831 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;