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Searched refs:SCLK_PWRMGT_CNTL (Results 1 – 22 of 22) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/radeon/
Drv770_dpm.c135 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in rv770_gfx_clock_gating_enable()
137 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in rv770_gfx_clock_gating_enable()
138 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); in rv770_gfx_clock_gating_enable()
139 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); in rv770_gfx_clock_gating_enable()
174 if (RREG32(SCLK_PWRMGT_CNTL) & DYN_GFX_CLK_OFF_EN) in rv770_restore_cgcg()
178 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in rv770_restore_cgcg()
183 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in rv770_start_dpm()
201 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in rv770_stop_dpm()
855 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in rv770_program_tp()
857 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in rv770_program_tp()
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Dcypress_dpm.c102 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
103 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
104 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
140 WREG32_P(SCLK_PWRMGT_CNTL, DYN_LIGHT_SLEEP_EN, ~DYN_LIGHT_SLEEP_EN); in cypress_gfx_clock_gating_enable()
142 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in cypress_gfx_clock_gating_enable()
144 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in cypress_gfx_clock_gating_enable()
145 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); in cypress_gfx_clock_gating_enable()
146 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); in cypress_gfx_clock_gating_enable()
150 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_LIGHT_SLEEP_EN); in cypress_gfx_clock_gating_enable()
247 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in cypress_enable_sclk_control()
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Drv730d.h83 #define SCLK_PWRMGT_CNTL 0x644 macro
Dr600_dpm.c247 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in r600_gfx_clockgating_enable()
249 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in r600_gfx_clockgating_enable()
306 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in r600_enable_sclk_control()
308 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in r600_enable_sclk_control()
361 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in r600_select_td()
363 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in r600_select_td()
365 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE); in r600_select_td()
367 WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE); in r600_select_td()
Dsumo_dpm.c91 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in sumo_gfx_clockgating_enable()
93 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in sumo_gfx_clockgating_enable()
94 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); in sumo_gfx_clockgating_enable()
95 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); in sumo_gfx_clockgating_enable()
441 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in sumo_program_tp()
443 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in sumo_program_tp()
446 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE); in sumo_program_tp()
449 WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE); in sumo_program_tp()
917 WREG32_P(SCLK_PWRMGT_CNTL, FIR_RESET, ~FIR_RESET); in sumo_reset_am()
922 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_RESET); in sumo_start_am()
Dtrinity_dpm.c402 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in trinity_gfx_clockgating_enable()
404 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in trinity_gfx_clockgating_enable()
405 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); in trinity_gfx_clockgating_enable()
406 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); in trinity_gfx_clockgating_enable()
465 WREG32_P(SCLK_PWRMGT_CNTL, DYN_PWR_DOWN_EN, ~DYN_PWR_DOWN_EN); in trinity_gfx_powergating_enable()
467 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_PWR_DOWN_EN); in trinity_gfx_powergating_enable()
729 if (RREG32(SCLK_PWRMGT_CNTL) & DYNAMIC_PM_EN) in trinity_wait_for_dpm_enabled()
760 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~(RESET_SCLK_CNT | RESET_BUSY_CNT)); in trinity_start_am()
765 WREG32_P(SCLK_PWRMGT_CNTL, RESET_SCLK_CNT | RESET_BUSY_CNT, in trinity_reset_am()
Dtrinityd.h175 #define SCLK_PWRMGT_CNTL 0x678 macro
Dsumod.h152 #define SCLK_PWRMGT_CNTL 0x644 macro
Drv730_dpm.c450 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in rv730_start_dpm()
468 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in rv730_stop_dpm()
Dci_dpm.c1500 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_start_dpm()
1502 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_start_dpm()
1561 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_stop_dpm()
1563 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_stop_dpm()
1584 u32 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_enable_sclk_control()
1590 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_enable_sclk_control()
2024 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_program_vc()
2026 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_program_vc()
2042 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_clear_vc()
2044 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_clear_vc()
Dkv_dpm.c503 u32 sclk_pwrmgt_cntl = RREG32_SMC(SCLK_PWRMGT_CNTL); in kv_start_am()
508 WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl); in kv_start_am()
513 u32 sclk_pwrmgt_cntl = RREG32_SMC(SCLK_PWRMGT_CNTL); in kv_reset_am()
517 WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl); in kv_reset_am()
Drv770d.h158 #define SCLK_PWRMGT_CNTL 0x644 macro
Dnid.h599 #define SCLK_PWRMGT_CNTL 0x644 macro
Dsi_dpm.c3326 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in si_enable_sclk_control()
3328 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in si_enable_sclk_control()
3757 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in si_program_tp()
3759 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in si_program_tp()
3762 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE); in si_program_tp()
3765 WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE); in si_program_tp()
Dsid.h251 #define SCLK_PWRMGT_CNTL 0x788 macro
Dcikd.h109 #define SCLK_PWRMGT_CNTL 0xC0200008 macro
Dni_dpm.c1205 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
1206 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
1207 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
Devergreend.h137 #define SCLK_PWRMGT_CNTL 0x644 macro
Dr600d.h1307 #define SCLK_PWRMGT_CNTL 0x620 macro
/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.c482 SCLK_PWRMGT_CNTL, RESET_SCLK_CNT, 0); in smu7_program_voting_clients()
484 SCLK_PWRMGT_CNTL, RESET_BUSY_CNT, 0); in smu7_program_voting_clients()
499 SCLK_PWRMGT_CNTL, RESET_SCLK_CNT, 1); in smu7_clear_voting_clients()
501 SCLK_PWRMGT_CNTL, RESET_BUSY_CNT, 1); in smu7_clear_voting_clients()
1102 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SCLK_PWRMGT_CNTL, in smu7_enable_sclk_control()
1272 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SCLK_PWRMGT_CNTL, in smu7_start_dpm()
1353 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SCLK_PWRMGT_CNTL, in smu7_stop_dpm()
/linux-6.6.21/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c3799 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in si_enable_sclk_control()
3801 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in si_enable_sclk_control()
4237 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in si_program_tp()
4239 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in si_program_tp()
4242 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE); in si_program_tp()
4245 WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE); in si_program_tp()
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dsid.h252 #define SCLK_PWRMGT_CNTL 0x1e2 macro