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Searched refs:SCL (Results 1 – 25 of 104) sorted by relevance

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/linux-6.6.21/drivers/i2c/busses/
Di2c-acorn.c19 #define SCL 0x02 macro
32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
36 ones |= SCL; in ioc_setscl()
38 ones &= ~SCL; in ioc_setscl()
47 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setsda()
62 return (ioc_readb(IOC_CONTROL) & SCL) != 0; in ioc_getscl()
87 force_ones = FORCE_ONES | SCL | SDA; in i2c_ioc_init()
Di2c-versatile.c20 #define SCL (1 << 0) macro
40 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setscl()
52 return !!(readl(i2c->base + I2C_CONTROL) & SCL); in i2c_versatile_getscl()
77 writel(SCL | SDA, i2c->base + I2C_CONTROLS); in i2c_versatile_probe()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce/
Ddce_i2c_sw.c29 #define SCL false macro
85 if (read_bit_from_ddc(ddc, SCL)) in wait_for_scl_high_sw()
113 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw()
118 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw()
134 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw()
145 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw()
168 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw()
176 write_bit_to_ddc(ddc_handle, SCL, false); in read_byte_sw()
197 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw()
202 write_bit_to_ddc(ddc_handle, SCL, false); in read_byte_sw()
[all …]
Ddce_transform.h76 SRI(SCL_MODE, SCL, id), \
77 SRI(SCL_TAP_CONTROL, SCL, id), \
78 SRI(SCL_CONTROL, SCL, id), \
79 SRI(SCL_BYPASS_CONTROL, SCL, id), \
80 SRI(EXT_OVERSCAN_LEFT_RIGHT, SCL, id), \
81 SRI(EXT_OVERSCAN_TOP_BOTTOM, SCL, id), \
82 SRI(SCL_VERT_FILTER_CONTROL, SCL, id), \
83 SRI(SCL_HORZ_FILTER_CONTROL, SCL, id), \
84 SRI(SCL_COEF_RAM_SELECT, SCL, id), \
85 SRI(SCL_COEF_RAM_TAP_DATA, SCL, id), \
[all …]
/linux-6.6.21/arch/arm/boot/dts/st/
Dste-dbx5x0-pinctrl.dtsi132 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
139 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
152 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
159 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
172 pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */
179 pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */
190 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
197 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
210 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
217 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
[all …]
/linux-6.6.21/drivers/rtc/
Drtc-rs5c313.c73 #define SCL SCSPTR1_SPB0DT macro
95 scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */ in rs5c313_init_port()
116 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_write_data()
119 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_write_data()
136 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_read_data()
139 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_read_data()
/linux-6.6.21/Documentation/i2c/
Dgpio-fault-injection.rst23 By reading this file, you get the current state of SCL. By writing, you can
25 "echo 0 > scl" you force SCL low and thus, no communication will be possible
27 the condition of SCL being unresponsive and report an error to the upper
62 being pulled low by the device while SCL is high. So, similar to the "sda" file
65 SDA after toggling SCL.
81 register 0x00 (if it has registers) when further clock pulses happen on SCL.
99 Arbitration lost is achieved by waiting for SCL going down by the master under
104 should be detected beforehand. Also note, that SCL going down is monitored
129 Start of a transfer is detected by waiting for SCL going down by the master
/linux-6.6.21/Documentation/devicetree/bindings/iio/temperature/
Dti,tmp007.yaml28 0 SCL 0x43
32 1 SCL 0x47
/linux-6.6.21/Documentation/devicetree/bindings/i2c/
Di2c-rk3x.yaml80 SCL frequency to use (in Hz). If omitted, 100kHz is used.
85 Number of nanoseconds the SCL signal takes to rise
93 Number of nanoseconds the SCL signal takes to fall
102 (t(f) in the I2C specification). If not specified we will use the SCL
Di2c.txt38 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
42 Number of nanoseconds the IP core additionally needs to setup SCL.
45 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
76 add extra pinctrl to configure SCL/SDA pins to GPIO function for bus
80 specify the gpio related to SCL pin. Used for GPIO bus recovery.
Drenesas,rcar-i2c.yaml96 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
102 Number of nanoseconds the IP core additionally needs to setup SCL.
107 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
Di2c-mt65xx.yaml89 SCL frequency to use (in Hz). If omitted, 100kHz is used.
100 description: Phandle to the regulator providing power to SCL/SDA
/linux-6.6.21/arch/arm/boot/dts/microchip/
Dlan966x-kontron-kswitch-d10-mmt-6g-2gs.dts68 /* SCL, SDA */
74 /* SCL, SDA */
/linux-6.6.21/arch/arm/boot/dts/nvidia/
Dtegra30-apalis-eval.dts87 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
109 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
117 /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
Dtegra124-apalis-v1.2-eval.dts81 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
103 * CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
112 * I2C4 (DDC): I2C4_SDA/SCL (DDC) on MXM3 pin 205/207
Dtegra124-apalis-eval.dts80 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
100 * GEN2_I2C: I2C2_SDA/SCL (DDC) on MXM3 pin 205/207 (e.g. display EDID)
107 * CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
Dtegra30-apalis-v1.1-eval.dts88 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
110 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
118 /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
/linux-6.6.21/arch/arm/boot/dts/nxp/imx/
Dimx6q-apalis-eval.dts63 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
80 * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
Dimx6q-apalis-ixora.dts68 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
85 * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/gpio/
Dddc_regs.h178 DDC_I2C_REG_LIST(SCL)\
197 DDC_REG_LIST_DCN2(SCL)\
/linux-6.6.21/Documentation/i2c/muxes/
Di2c-mux-gpio.rst16 | | SCL/SDA | |-------------- | |
25 SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
/linux-6.6.21/arch/arm/boot/dts/ti/omap/
Domap4-sdp-es23plus.dts7 /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
Domap4-panda-a4.dts10 /* Pandaboard Rev A4+ have external pullups on SCL & SDA */
/linux-6.6.21/arch/arm/boot/dts/samsung/
Dexynos4412-i9305.dts19 /* SCL and SDA pins are swapped */
/linux-6.6.21/Documentation/devicetree/bindings/i3c/
Di3c.yaml44 Frequency of the SCL signal used for I3C transfers. When undefined, the
51 Frequency of the SCL signal used for I2C transfers. When undefined, the
92 supports high frequency on SCL

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