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Searched refs:RXTX_REG99_MU_PHASE2_SET (Results 1 – 1 of 1) sorted by relevance

/linux-6.6.21/drivers/phy/
Dphy-xgene.c430 #define RXTX_REG99_MU_PHASE2_SET(dst, src) \ macro
1083 val = RXTX_REG99_MU_PHASE2_SET(val, 0x7); in xgene_phy_sata_cfg_lanes()